Dt And Gs-Board Block Diagram - Panasonic TH-58PX600U Service Manual

TH-58PX600U

15.30. DT and GS-Board Block Diagram

DT ATSC INTERFACE
Q8201
XF8202
COMB FILTER
1
2
SAW_DRIVER
20
OUTPUT_2
SAW_DRIVER
19
OUTPUT_1
RF_AGC_AMP
Q8203
16
INPUT1
IC8206
AGC AMP(IF STRIP)
XF8200
OUT1
2 7
X9303P
3 6
OUT2
4 AGC CTL
IF_AGC
D8200
IC8204
L/H CHECK
DIGITAL
RF AGC
2 1
O/I I/0
D_A_SW
CONT 4
D_A_SW
H ON
L OFF
IC8203
L/H CHECK
ANALOG
RF AGC
2 O/I I/0 1
CONT 4
TU8200
TUNER
IF_SW
OOB OUT
H ON
1
AGC L OFF
8
SCL
10
SDA
9
AFT
AFT
11
AGC OUT
12
VIDEO_OUT
VIDEO_OUT
13
L_ANALOG
L_OUT
16
R_ANALOG
R_OUT
15
IF_OUT
19
IF_SW
20
30V
BTL
4
ANT_V
SUPPLY
2
5V_A IC8218
V_SUPPLY
7 +3.3V 1.8V
AVR 1.8V
BV
18
1 VIN VOUT 5
GS SD CARD SLOT
SD CARD 3.3V
3.3V GS52
JK7701
SLOT
3.3V 4
SDCMD 2
SDCLK 5
SDDAT0 7 8
SDDAT3 9 1
D.SW
W.P .
SD LED
H:LED ON
D7704
TH-58PX600U
DT and GS-Board Block Diagram
IC8211
FRONT PROCESSOR
(TERRESTRIAL RECEIVER)
PSYNC0
58 OBAGCRF MPEG_CLK 108
MPEG_ERR
MPEG_ERR 93
MPEG_DATA_EN
6
MPEG_DATA_EN 94
MPEG_PKT_SYNC
5 MPEG_PKT_SYNC 91
SER_DATA
SER_DATA 106
3 2 POD_DRX
OBDRX 115
FDC_P
IF AMP IF AMP POD_CRX
IF_DRIVER_AMP
9 14 OBAINP OBCRX 114
INPUT2 INPUT1
OUTPUT2
FDC_N
IF_DRIVER_AMP
8 15 OBAINN
IC8253 OUTPUT1
AGC_CONTROL 6 59 OBAGCIF
IF DOWN
CONVERTER
LO INPUT1 12 30 LCKP
(AGC AMP ,MIXER)
LO INPUT2 13 29 LCKN
TO FRONT
TDI 137
TRST
TRST 136
35 XO
X8200 TMS
TMS 135
JTAG
36 XI
TCK
FILTER TCK 134
FAT_P TD0
C8413,8414 TD0 133
39 IBAINP
C8432-8436
FAT_N
L8303-8305 40 IBAINN
INT 84
176 AGC_CONT
NRST 68
IC8205
IC8229
AGC AMP
EEPROM
6 53 RF_AGC
SDA 87 5
SDA
7
54 IF_AGC
5 SCL 88 6 SCL
62 OBMSDA
3
63 OBMSCL
SCL1
1
2 SDA1
SCL_FE
MAIN_SW SDA_FE
H ANALOG
L DIGITAL
IC8217
D_A_SW MAIN_SW
Q8220
VBI,TUNER MPX IIC ADDR
Q8231
1 AIP1A SCL 21
D_A_SW IC8202
SDA 22
5 X1
H DIGITAL
SERIAL SW
L ANALOG
6 X2 RESET 8
1
X8201
Q8217 13
14.31818MHz
2
3
IC8222
5 SDA_TV
4
SCL_TV 128M WORK CPU SDRAM
8
Q8218 6
9
10
Q8219 12
11
ED16-ED31
SCL_TUNER
I/O1-I/O16
SDA_TUNER
IC8223
64M CPU FLASH ROM
ED16-ED31
D0-D15
VIDEO_OUT
Q8226
EA1-EA22
A0-A21
AFT/L,R-ANALOG
CLK133M
XRST
IC8022
CLOCK GEN
10
133M
1 X1 VIN 4 IC8201
X8005 74M 7
AUDIO AMP
16 X2 27M 9
2
L_OUT
1
3
5
R_OUT
7
6
DT10 3.3V
1 1
3.3V
DATA0
DATA0
8 8
DATA1
9 DATA1 9 TO 5V_SUB
DT07
DATA2
HC06
10 DATA2 10
DATA3
DATA3 +5V 1
11 11
CMD
SBI0 2
5 SDCMD 5
CLK
SDCLK SBO0 3
3 3
SDCD
7 SDCD 7
SDWP
12 SDWP 12 4
SDLED
4 IR
13 13 JK8200
SDLED
3
TXD
IR
2
RXD
1
9V_SUB 9V_POWER
IC8246
DC-DC CONVERTER
5V_SUB
9V 3.3V 3 VPPOUT
3.3V
4 VPPOUT
5 21
VCC VIN
9 3VIN
20 19
CB OUT-1 10 3VIN
11 3VIN
17 VDD OUT-2 16 G2 S2 G1 S1
12
3VIN
D2 D2 D1 D1
LX 18
13 3VIN
9V_POWER
3.3V
-INC 13 VPP EN0 EN1
Q8229
3.3V H L IC8250
9 CTL VO 23
5V L H
POWER MANAGEMENT
FB 24
2ch SWITCH
9V_SUB 9V_POWER
IC8247
DC-DC CONVERTER
5V_SUB
9V 1.2V
5 21
VCC VIN
20 CB OUT-1 19
17 VDD OUT-2 16 G2 S2 G1 S1
D2 D2 D1 D1
LX 18
1.2V
9V_POWER
-INC 13
Q8230
9 CTL VO 23
FB 24
XIRQ1 FRONT
XFERST0
IC8240
VBI_RST
HDSL PEAKS_Lite
SCL0 PSYNC0
PSYNC0
ENABLE0
TD2S
SDA0 ENABLE0
SCHDATA0
MCP2L
SCHDATA0
AM33(200MHz)
SCHCLK0
SCHCLK0
NTSC ENC.
XPODRST
ASIC_RESET
VIDEO DAC
XECS3/XECS4
XECS3 ASIC PERIPHERAL
XEWE2/XEWE3
XEWE2
XERE
XERE
XEDK
XEDK ASIC
XIRQ3/XIRQ4
XIRQ3 ASIC
ECLK/ECLK1
ECLK ASIC
XWP
CONTROL BUS(NAND I/F) ALE
CLE
RE
WE
PEAKS_Lite(1/3)
ED16
DATA BUS
PEAKS_Lite(3/3)
ED31
EA1
ADDRESS BUS
NOR FLASH ROM I/F
EA22
XECS0L
CONTROL BUS
XEREL
XEWE2
FWP
VC27
CLK74
MCK27
IC8200
AUDIO DAC
PDN 5 DACRST
11 AOUTL MCLK 1 DACCK
BICK 2 SRCK
9V SUB
SDTI DMIX
10 AOUTR 3
LRCK 4 LRCK
DATA0
SD_DATA0
DATA1
SD_DATA1
DATA2
SD_DATA2
DATA3
SD_DATA3
CMD
SDCMD
CLK
SDCLK
SDCD PEAKS_Lite(1/3)
SDCD
SDWP
SDWP
SDLED
REAL_TIME_CLOCK
SBI0
SBO0
SBO2
PEAKS_Lite(2/3)
SBI2
Q8236 IR VDD12 VDD33 AAVDD DAVDD MAVDD
Q8237 1.2V 3.3V
Q8207,Q8208
106
EN0 1 8 EN_VPP3
IC8216
2 9
EN1 EN_VPP5
MPEG_CLK DATA BUS
POD ASIC
54 FE_CLK MOD D0-D7
MPEG_ERR
MOD MDO0-MDO7
60 FE_ERR
MPEG_DATA_EN
5V_SUB
56 FE_EN
MPEG_PKT_SYNC
49
15 FE_SYNC
5VIN
SER_DATA
51 FE_DATA
POD_DRX
120 FE_DRX
POD_CRX
FE_CRX
128
124 CLKIN133
A0-A3,A10-A13
TMS
34 TMS
(A4,A7) CTX,QTX
TCK
1 TCK (A6,A5) ETX,ITX
A0
TRST ADDRESS BUS
3 (A8,A9) CRX,DRX
TRST JTAG
A25
TO_ASIC (A14,A15) MCLKO,MCLKI
105 TDI
TO_DT12 (A16,A17) MIVAL,MISTRT
4 TDO
(A18-A25) MDI0-MDI7
XPODRST
122 RESETn
ECLK
126 ECLK
XECS3
144 XECS
EA2
143 EA
XEWE2
142
XEWENO
XERE
CD1n,CD2n
141 XEREN
XEDK
WAIT,IREQ
140 XEDKN
CONTROL BUS
XIRQ3
138 INTN WP ,INPACK
PSYNC0
MOSTRT(BVD2)
133 BE_SYNC
ENABLE0
MOVAL(BVD2)
132 BE_EN
SCHDATA0
131 BE_DATA
REG,RESET
SCHCLK0
130 BE_CLK
CONTROL BUS
IOWR,IORD
109 ED0 CE1,CE2
DATA BUS
WE,OE
ED16-ED23
117 ED7
JTAG I/F TD0
TCK
Joint
TDI IC8227
TRST
Test TMS
TMS
Action 3.3V
TCK RESET
Group
TCK
POWER_DET
POWER_DET XRST 4 OUT VDD 2
SDA_TV
SD_BOOT
SD_BOOT
SCL_TV
XRST
XRST
IC8228
AFT
SUB 9V
RESET MAIN_SW
SCL0
SCL0
R_ANALOG
SDA0 SDA0
1 VOUT VDD 2
L_ANALOG
SCL1 SCL1
R_OUT
SDA1
SDA1
L_OUT
SBO1
VIDEO_OUT
SBO1
SBI1
SBI1
POWER_DET
VSYNC
ISOVAL
SDBOOT
CLK
ISOCLK IC8009,IC8010
XRST
HSYNC
ISOSYNC
SBO1
256M DDR_SDRAM
SBI1
MMDQ0
DATA BUS
VSYNC
MMDQ31
CLK
MMA0
ADDRESS BUS
D8208 HSYNC
MMA13
DIGITAL
3.3V
AUDIO OUT
CONTROL BUS
9V_SUB
IEC_OUT
5V_A
IC8244
5V_SUB
16Bit AUDIO A/D
ADIN MAIN_R
ADIN 9 1
SDTO AINR
SLRCK MAIN_L
SLRCK 10 LRCK AINL 2
PDWN
PDWN 13 PDN
MVY0
MVY0 MVY7
MVY7
MVC0
MVC0 MVC7
MVC7
MHSYNC0
MVSYNC0
MVCLK0
Q8211
DC
Q8210
DY
Q8209
XSRQ
FORMAT EDGE
2.5V IC8235
VDDQ
(DDR SDRAM)
SVAVDD MVAVDD AVDD 3.3V
AVR 2.5V
2.5V
1 6
VOUT VDD
DT04 Cable CARD
18 52
5V
17 51 3.3V
30 32 D0-D2
+3.3V
2 6 D3-D7
MDO0-MDO2
64 66
(D8-D10)
MDO3-MDO7
37 41
(D11-D15)
29 26 A0-A3
25 24 CTX,ITX
(A4,A5)
23 22 ETX,QTX
(A6,A7)
12 11 CRX,DRX
(A8,A9)
8 10 A10,A11
21 13 A12,A13
MCLKO,MCLKI
14 20
(A14,A15)
MIVAL,MISTRT
19 46
(A16,A17)
MDI0-MDI3
47 50
(A18-A21)
MDI4-MDI7
53 56
(A22-A25)
36 67 CD1,CD2
IREQ,WAIT
16 59
(READY)
WP ,INPACK
33 60
(IOIS16)
BVD2, BVD2
62 63
(MOVAL) (MOSTRT)
58 61 RESET,REG
44 45 IORD,IOWR
7 42 CE1,CE2
9 15
OE,WE
TO
DT12
DG22
26 TCK
30 TRST(JTAG_TRST)
32 SCL1(DTV_SCL0B)
SCL1
SDA1 33 SDA1(DTV_SDA0B)
SDA_TV
34
(SDA0B)
SCL_TV
35
(SCL0B)
37
AFT(AFT1)
36 MAIN_SW
62 ATV_SR
64 ATV_SL
43
R_OUT(BS_SR)
41 L_OUT(BS_SL)
13 VIDEO_OUT
POWER_DET
15
(SW_OFF)
16 SDBOOT
22 XRST(DTV_RST)
SBO1(RXD1)
18
19 SBI1(TXD1)
80 VSYNC
85 CLK
87
HSYNC
30V
8 30V(BT30V)
SUB 9V
51
52 SUB 9V
53 SUB 9V
54 SUB 5V
57 SUB 5V
58 MAIN_R
60 MAIN_L
88 MVY0 (PEAKS_Y0)
96
MVY7 (PEAKS_Y7)
97 MVC0 (PEAKS_C0)
105 MVC7 (PEAKS_C7)
107 MHSYNC0(PEAKS_H)
106 MVSYNC0(PEAKS_V)
109 MVCLK0(PEAKS_CLK)
DC(BS_C)
47
45 DY(BS_Y)
23 SRQ
FORMAT
24
EDGE
TH-58PX600U
DT and GS-Board Block Diagram