Denon DCD-A100 Service Manual page 74

Pin
Pin Name
No.
28 XOUT
29 XIN
30 DVDD
31 DGND
32 EMPHA/UO
33 AUDIO/VO
34 CKST
35 INT
36 RERR
37 DO
38 DI
39 CE
40 CL
41 XMODE
42 DGND
43 DVDD
44 TMCK/PIO0
45 TBCK/PIO1
46 TLRCK/PIO2
47 TDATA/PIO3
48 TXO/PIOEN
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
I/O
O X'tal osc. connecting output terminal
I X'tal osc. connection, external clock input terminal (24.576MHz or 12.288MHz)
— Digital power
— Digital GND
I/O Emphasis information/U-data output/Chip address setting terminal
I/O Non-PCM detect/V-flag output/ Chip address setting terminal
I/O Clock switch transition period output/Demodulation master or slave function switching terminal
Interrupt output for μcom (Interrupt factor selectable)/Modulation or general I/O switching terminal
I/O
O PLL lock error, data error flag output
μcom I/F, read out data output terminal (3-state)
O
μcom I/F, write data input terminal
I
μcom I/F, chip enable input terminal
I
μcom I/F, clock input terminal
I
I System reset input terminal
— Digital GND
— Digital power
I/O 256fs system clock input for modulation/General I/O in/output terminal
I/O 64fs bit clock input for modulation/General I/O in/output terminal
I/O fs clock input for modulation/General I/O in/output terminal
I/O Serial audio data input for modulation/General I/O in/output terminal
O/I Modulation data output/ General I/O enable input terminal
Function
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