Denon AVR-2311CI Service Manual page 174

Pin# Signal Name
GPIO_D[17]
94
GPIO_D[18] / UART1TXD
95
GPIO_D[19] / UART1RXD
96
VSS
97
GPIO_D[20] / UART1RTSn
98
GPIO_D[21]
99
TDI / GPIO_J[1]
100
TMS / GPIO_J[2]
101
TCK / GPIO_J[3]
102
TDO / GPIO_J[0]
103
nTRST / GPIO_J[4]
104
GPIO_A[0] / SPDIFTX
105
GPIO_A[1] / CBCLK
106
GPIO_A[2] / CLRCK
107
GPIO_A[3] / CDAI
108
GPIO_A[4]
109
VDDI
110
GPIO_A[5]
111
GPIO_A[6]
112
GPIO_A[7]
113
GPIO_A[8]
114
GPIO_A[9]
115
GPIO_A[10]
116
GPIO_A[11]
117
VSS
118
VDDIO
119
GPIO_A[12] / EXINT[0]
120
GPIO_A[13] / EXINT[1]
121
GPIO_A[14] / EXINT[2]
122
GPIO_A[15] / EXINT[3]
123
VDDI
124
XD[0]
125
XD[1]
126
XD[2]
127
XD[3]
128
Type Description – TCC8600
I/O GPIO_D[17] / I2C SCL
I/O GPIO_D[18] / UART1 TX Data. Internal pull-up resistor enabled at reset.
I/O GPIO_D[19] / UART1 RX Data. Internal pull-up resistor enabled at reset.
GND Digital Ground
GPIO_D[20] / UART1 RTS Output (active low). Internal pull-up resistor enabled at
I/O
reset.
I/O GPIO_D[21]. Internal pull-up resistor enabled at reset.
I/O JTAG serial data input. Internal pull-up resistor is enabled at reset
I/O JTAG test mode select. Internal pull-up resistor is enabled at reset
I/O JTAG test clock. Internal pull-up resistor is enabled at reset
I/O JTAG serial data output. Internal pull-up resistor is enabled at reset
I/O JTAG reset signal. Active low.. Internal pull-up resistor is enabled at reset
I/O GPIO_A[0] / SPDIF TX Output / GPSB/GSIO1 Data Output
I/O CD Data Bit Clock Input / GPIO_A[1] / GPSB/GSIO1 Clock
I/O CD Data Word Clock Input / GPIO_A[2] / GPSB/GSIO1 FRM
I/O CD Data Input / GPIO_A[3] / GPSB/GSIO1 Data In
I/O GPIO_A[4] / GPSB/GSIO1 Data Output
PWR Digital Power for Internal Core (1.8V)
I/O GPIO_A[5] / GPSB/GSIO1 Clock
I/O GPIO_A[6] / GPSB/GSIO1 FRM
I/O GPIO_A[7] / GPSB/GSIO1 Data In
I/O GPIO_A[8] / I2C Data Line / GPSB/GSIO3 Data Output
I/O GPIO_A[9] / I2C Clock./ Bus Width (BW) / GPSB/GSIO3 Clock
I/O GPIO_A[10] / I2C Data Line / GPSB/GSIO3 FRM
I/O GPIO_A[11] / I2C Clock / GPSB/GSIO3 Data In
GND Digital Ground
PWR Digital Power for I/O (3.3V)
I/O GPIO_A[12] / External Interrupt Request [0]
I/O GPIO_A[13] / External Interrupt Request [1]
I/O GPIO_A[14] / External Interrupt Request [2]
I/O GPIO_A[15] / External Interrupt Request [3]
PWR Digital Power for Internal Core (1.8V)
I/O External Bus Data Bit [0]. Internal pull-up resistor enabled at reset.
I/O External Bus Data Bit [1]. Internal pull-up resistor enabled at reset.
I/O External Bus Data Bit [2]. Internal pull-up resistor enabled at reset.
I/O External Bus Data Bit [3]. Internal pull-up resistor enabled at reset.
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