Denon AVR-2311CI Service Manual page 171

Signal Name
GPIO_A[15] / EXINT[3]
GPIO_A[14] / EXINT[2]
GPIO_A[13] / EXINT[1]
GPIO_A[12] / EXINT[0]
GPIO_A[11]
GPIO_A[10]
GPIO_A[9]
GPIO_A[8]
GPIO_A[7]
GPIO_A[6]
GPIO_A[5]
GPIO_A[4]
GPIO_A[3] / CDAI
GPIO_A[2] / CLRCK
GPIO_A[1] / CBCLK
GPIO_A[0] / SPDIFTX
GPIO_B[25] / DAI
GPIO_B[24] / DAO
GPIO_B[23] / MCLK
GPIO_B[22] / LRCK
GPIO_B[21] / BCLK
GPIO_B[9] / UART0RXD
GPIO_B[8] / UART0TXD
GPIO_B[6] / IDE_nCS1
GPIO_D[21]
GPIO_D[20] / UART1RTSn
GPIO_D[19] / UART1RXD
GPIO_D[18] / UART1TXD
GPIO_D[17]
GPIO_D[16]
GPIO_D[15] / UART1CTSn
ADIN0
ADIN2
ADIN4
XIN
XOUT
XTIN
XTOUT
XFILT
XFILT1
TDI / GPIO_J[1]
TMS / GPIO_J[2]
TCK / GPIO_J[3]
TDO / GPIO_J[0]
nTRST / GPIO_J[4]
MODE1
nRESET
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDUSB
VDDI
VDDI
VDDI
Pin# Type Description – TCC8600
123 I/O GPIO_A[15] / External Interrupt Request [3]
122 I/O GPIO_A[14] / External Interrupt Request [2]
121 I/O GPIO_A[13] / External Interrupt Request [1]
120 I/O GPIO_A[12] / External Interrupt Request [0]
117 I/O GPIO_A[11] / I2C Clock / GPSB/GSIO3 Data In
116 I/O GPIO_A[10] / I2C Data Line / GPSB/GSIO3 FRM
115 I/O GPIO_A[9] / I2C Clock./ Bus Width (BW) / GPSB/GSIO3 Clock
114 I/O GPIO_A[8] / I2C Data Line / GPSB/GSIO3 Data Output
113 I/O GPIO_A[7] / GPSB/GSIO1 Data In
112 I/O GPIO_A[6] / GPSB/GSIO1 FRM
111 I/O GPIO_A[5] / GPSB/GSIO1 Clock
109 I/O GPIO_A[4] / GPSB/GSIO1 Data Output
108 I/O CD Data Input / GPIO_A[3] / GPSB/GSIO1 Data In
107 I/O CD Data Word Clock Input / GPIO_A[2] / GPSB/GSIO1 FRM
106 I/O CD Data Bit Clock Input / GPIO_A[1] / GPSB/GSIO1 Clock
105 I/O GPIO_A[0] / SPDIF TX Output / GPSB/GSIO1 Data Output
90 I/O I2S Digital Audio data Input / GPIO_B[25]
89 I/O I2S Digital Audio data Output / GPIO_B[24] / Boot Mode Bit 2 (BM[2])
88 I/O I2S System Clock / GPIO_B[23]
87 I/O I2S Word Clock / GPIO_B[22] / Boot Mode Bit 1 (BM[1])
86 I/O I2S Bit Clock / GPIO_B[21] / Boot Mode Bit 0 (BM[0])
63 I/O GPIO_B[9] / UART0 RX Data
62 I/O GPIO_B[8] / UART0 TX Data
60 I/O GPIO_B[6] / Chip select 1 for IDE Interface. Internal pull-up resistor enabled at reset.
99 I/O GPIO_D[21]. Internal pull-up resistor enabled at reset.
GPIO_D[20] / UART1 RTS Output (active low). Internal pull-up resistor enabled at
98 I/O
reset.
96 I/O GPIO_D[19] / UART1 RX Data. Internal pull-up resistor enabled at reset.
95 I/O GPIO_D[18] / UART1 TX Data. Internal pull-up resistor enabled at reset.
94 I/O GPIO_D[17] / I2C SCL
93 I/O GPIO_D[16] / I2C SDA
92 I/O GPIO_D[15] / UART1 CTS Input (active low)
68 AI General purpose multi-channel ADC input 0
67 AI General purpose multi-channel ADC input 2
66 AI General purpose multi-channel ADC input 4
55 I 12MHz Crystal Oscillator Input. Voltage must not exceed VDDI (1.95V).
54 O 12MHz Crystal Oscillator Output
57 I 32.768kHz Crystal Oscillator Input.Voltage must not exceed VDDI (1.95V).
56 O 32.768kHz Crystal Oscillator Output
75 AO PLL0 filter output. 350pF capacitor is required.
72 AO PLL1 filter output. 1200pF capacitor is required.
100 I/O JTAG serial data input. Internal pull-up resistor is enabled at reset
101 I/O JTAG test mode select. Internal pull-up resistor is enabled at reset
102 I/O JTAG test clock. Internal pull-up resistor is enabled at reset
103 I/O JTAG serial data output. Internal pull-up resistor is enabled at reset
104 I/O JTAG reset signal. Active low.. Internal pull-up resistor is enabled at reset
78 I Mode Setting Input 1. Pull-down for normal operation.
77 I System Reset. Active low.
9 PWR Digital Power for I/O (3.3V)
26 PWR Digital Power for I/O (3.3V)
43 PWR Digital Power for I/O (3.3V)
65 PWR Digital Power for I/O (3.3V)
85 PWR Digital Power for I/O (3.3V)
119 PWR Digital Power for I/O (3.3V)
84 PWR Power for USB I/O (3.3V)
7 PWR Digital Power for Internal Core (1.8V)
24 PWR Digital Power for Internal Core (1.8V)
40 PWR Digital Power for Internal Core (1.8V)
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