Sfp Module Connector - Xilinx ML605 Hardware User's Manual

Chapter 1: ML605 Evaluation Board
See the following websites for more Virtex-6 FPGA Integrated Endpoint Block for PCI
Express information:
•
•
In addition, see the PCI Express specifications for more information.

10. SFP Module Connector

The board contains a small form-factor pluggable (SFP) connector and cage assembly that
accepts SFP modules. The SFP interface is connected to MGT Bank 116 on the FPGA. The
SFP module serial ID interface is connected to the "SFP" IIC bus (see
information). The control and status signals for the SFP module are connected to jumpers
and test points as described in
Table
Table 1-9: SFP Module Control and Status
SFP_TX_FAULT
SFP_TX_DISABLE
SFP_MOD_DETECT
SFP_RT_SEL
SFP_LOS
38
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1-10.
SFP Control/Status
Signal
Test Point J52
High = Fault
Low = Normal Operation
Jumper J65
Off = SFP Disabled
On = SFP Enabled
Test Point J53
High = Module Not Present
Low = Module Present
Jumper J54
Jumper Pins 1-2 = Full Bandwidth
Jumper Pins 2-3 = Reduced Bandwidth
Test Point J51
High = Loss of Receiver Signal
Low = Normal Operation
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Table 1-9. The SFP module connections are shown in
Board Connection
(UG517) [Ref 24]
[Ref 30]
15. IIC Bus for more
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019