Default Switch And Jumper Settings - Xilinx VCU128 User Manual

Default Switch and Jumper Settings

Switches
Default switch settings are listed in the following table. The switch locations are shown in
2. The following table also references the respective schematic page numbers.
Table 2: Default Switch Settings
Switch Function
SW5 On/Off SPST slide switch
SW1 4-pole configuration
Default = SPI
SW2 FPGA_PROG_B P.B.
SW3 SYSCTLR_POR_B P.B.
SW4 CPU_RESET P.B.
Notes:
1. DIP switch sections are active-High (connected net is pulled High when DIP switch is closed = 1).
Jumpers
Default jumper settings are listed in the following table. Jumper header locations are shown in
Figure 2. The following table also references the respective schematic page numbers.
Table 3: Default Jumper Settings
Jumper
J14 Power on reset (POR)
override
J25 VCCINT select
J46 PCIe lane size select
J43 SYSCTLR RE-PROG
Notes:
1. VCCINT select header J25 should always have a jumper block installed.
UG1302 (v1.0) December 21, 2018
VCU128 Board User Guide
Default
OFF Board shipped with power switch off
1
SW1[1:4] = Position 1 = System Controller Enable
SW1[2:4] = FPGA U1 mode M[2:0] = 001
0001
NA U1 XCVU37P PROG_B (active low)
NA U42 XC7Z010 POR_B (active low)
NA U1 XCVU37P USER P.B. (active high)
Function Default
2-3
1-2
7-8
Off
Chapter 2: Board Setup and Configuration
Comments
Comments
U1 POR_OVERRIDE pin
BG15 to GND
1-2: 0.85V; 2-3: 0.72V 1
16-lane configuration
U42 XCZU7010 MIO5 pin
A9
Send Feedback
Figure
Figure 2 Schematic
Callout Page
33 52
36 3
30 3
Near 50
29
29 47
Figure 2 Schematic
Callout Page
38 3
39 54
37 41
40 50
www.xilinx.com
13