High-Speed Counter (Single-Phase) - Hitachi HIDIC MICRO-EH Applications Manual

8.2

High-Speed Counter (Single-Phase)

The high-speed counter settings are stored in the special internal outputs (WRF070 to 7E). It is only possible to perform
the setting through the special internal output (WRF071) when the CPU is stopped and the output is turned off. Once all
the input/output settings are completed, the settings of each counter can be changed using the special internal outputs for
individual setting (WRF058 to 5B), regardless of whether the CPU is operating or stopped. In addition, the settings can
be changed by a program using the FUN instruction (FUN140 to 142, and 146). Refer to the chapter about the FUN
instruction for information about how to use the FUN instruction for setting.
8.2.1 Operation of Single-Phase Counter
(1) Basic operation
Figure 8.5 describes the basic operation of the high-speed counter.
FFFFH
Off preset
1]
On preset
0000H
U: Up counter
D: Down counter
ON
Coincidence
output
OFF
ON
R7FC to R7FF
OFF
Coincidence
interrupt
ON
n: Even number
OFF
m: Odd number
1]
On preset
2]
Off preset
Up counter
1] The counter output turns on* when the current counter value becomes larger than the on-preset value. The
interrupt process (INT2n) starts up if an interrupt program is used in the running user program.
2] The counter output turns off when the current counter value becomes larger than the off-preset value. The
interrupt process (INT2m) starts up if an interrupt program is used in the running user program.
3] The counter values wrap around in a ring. That is, the current counter value goes back to 0h when one more pulse
is counted after the maximum value (FFFFH) is reached.
Down counter
4] The counter output turns on* when the current counter value becomes smaller than the off-preset value. The
interrupt process (INT2m) starts up if an interrupt program is used in the running user program.
5] The counter output turns off when the current counter value becomes smaller than the on-preset value. The
interrupt process (INT2n) starts up if an interrupt program is used in the running user program.
6] The counter values wrap around in a ring. That is, the current counter value becomes FFFFH when one more
pulse is counted after the minimum value (0H) is reached. Note also that the initial value of the counter is 0H, and
the value reaches FFFFH after the first pulse is counted after the start of operation.
Chapter 8 High-speed counter, PWM / Pulse train output and Analogue I/O
3]
2]
7]
U U
D
INT2n INT2m INT2n
4]
Off preset
Coincidence interrupt
occurrence
Coincidence output On
5]
On preset
Coincidence interrupt
occurrence
Coincidence output Off
Figure 8.5 Basic operation of high-speed counter (single-phase)
4]
5]
6]
D U
INT2n INT2m INT2n INT2n
Coincidence interrupt
occurrence
Coincidence output On
Coincidence interrupt
occurrence
Coincidence output Off
8-6
U
D
INT2m INT2n INT2n INT2m
Each coincidence interrupt
and INT number
Counter 1 At on-preset
At off-preset
Counter 2 At on-preset
At off-preset
Counter 3 At on-preset
At off-preset
Counter 4 At on-preset
At off-preset
D
INT20
INT21
INT22
INT23
INT24
INT25
INT26
INT27