Disabling Onboard Power; Default Jumper And Switch Positions; Monitoring Voltage And Current; References - Xilinx Kintex-7 FPGA KC724 User Manual

Disabling Onboard Power

Each core power regulator can be disabled through the 8-position regulator enable DIP
switch, SW10 as shown in
supplied by an onboard regulator. Setting a switch in the opposite (OFF) position disables
onboard power for that rail. SW10 is shown in
X-Ref Target - Figure 1-5
Note:
(callout 6,
power through J27 would require the UTIL_5V0, UTIL_3V3 and UTIL_2V5 be supplied externally as
well. The utility rails can be supplied through test points J58, J59 and J155, respectively.

Default Jumper and Switch Positions

A list of jumpers and switches and their required positions for normal board operation is
provided in

Monitoring Voltage and Current

Voltage and current monitoring and control are available for selected power rails through
Texas Instruments' Fusion Digital Power graphical user interface (GUI). The three onboard
TI power controllers (U9 at PMBUS address 52, U10 at PMBUS address 53, and U11 at
PMBUS address 54) are wired to the same PMBus. The PMBus connector, J26 (callout 5,
Figure
associated TI GUI.

References

More information about the power system components used by the KC724 board are
available from the
KC724 GTX Transceiver Characterization Board
UG932 (v2.2) October 10, 2014
Figure
Pin 1
Figure 1-5: Core Power Regulator Enable Switches
All onboard power can be disabled by placing a jumper across the TI PWR INH header J27
Figure 1-2). For the purposes of supplying external core power however, disabling onboard
Appendix A, Default Jumper and Switch
1-2), is provided for use with the TI USB Interface Adapter PMBus pod and
Texas Instruments Digital Power website
www.xilinx.com
1-5. A switch in the ON position means the rail is
Figure 1-2 as callout 8.
SW10
VCCINT
VCCAUX
VCCBRAM
VCCAUX_IO
VCCO_HP
VCCO_HR
NC
NC
UG932_c1_05_062812
Positions.
.
Detailed Description
13
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