Table of Contents
Advertisement
MICROCOMPUTER'S TERMINAL DESCRIPTION
Pin No.
Pin Name
46
/MUTE R
47~71
NC
72
VSS
73~75
NC
76
ELVADJ
77~80
NC
81
VDD
82
NC
83
REQH
84
SP/LO+
85
SP/LO-
86
ELV+
87
ELV-
88,89
NC
90,91
TEST1,TEST2
92
8V/7V
93
EEPWR
94
TEST/VPP
95
DATA
96
/CLK
97
SDA
98
SCL
99
NC
100
ARMSW
MECHANISM CONTROL IC : 91CW12AFG-5DN4 (X32 : IC4)
Pin No.
Pin Name
1
VREFL
2
AVSS
3
AVCC
4
NC
5
20RST
6
20ACK
7
20STBY
8,9
NC
10
20INT
11
FOGUP
12
LZM
13
RZM
14,15
NC
16
20CS
17
20LP
I/O
O
Rch audio muting signal output terminal (L : Muting ON)
-
NC
-
VSS
-
NC
I
Mechanism deck position adjustment mode select terminal (L : Adjustment mode)
-
NC
-
VDD (BU 5V)
-
NC
Communication request from Head unit
O
Spindle/Loading motor control terminal
O
Spindle/Loading motor control terminal
O
Elevator motor control terminal
O
Elevator motor control terminal
-
NC
I
Test mode terminal
O
Mechanism driver IC control terminal
I
EEPROM writing mode control terminal (H : Writing, L : NORMAL)
I
Flash ROM program mode control terminal
I/O
Serial data communication to mechanism control IC
I/O
Serial clock communication to mechanism control IC
I/O
EEPROM data I/O terminal
O
EEPROM clock output terminal
-
NC
I
ARM SW detector (H : Arm SW ON)
I/O
I
Reference V input terminal (for ADC)
-
GND (for ADC)
-
BU3.3V (for ADC)
O
NC (open)
O
Reset control terminal (for decoder, L : RESET, H : NORMAL)
I
Acknowledge signal input terminal (for decoder)
O
Stand-by control terminal (for decoder, H : STAND BY, L : NORMAL)
O
NC (open)
I
Interrupt signal input terminal (for decoder)
I
Focus gain interrupt input terminal (H : Fo gain UP, L : NORMAL)
I
0bit MUTE detect (Lch) (L : MUTE OFF, H : MUTE ON)
I
0bit MUTE detect (Rch) (L : MUTE OFF, H : MUTE ON)
O
NC
O
Chip select signal output terminal (for decoder)
O
Latch pules signal output terminal (for decoder)
KDC-CMP21V
Description / Processing Operation
Description / Processing Operation
5
Advertisement
Table of Contents
