Data Acquisition And Processing Subgroup - Agilent Technologies E8362A Service Manual

Theory of Operation
Digital Processing and Digital Control Group Operation

Data Acquisition and Processing Subgroup

The data acquisition and processing subgroup contain the following assemblies. Refer to
Figure 5-7 on page 5-24.
• A6 SPAM Board (Digital Description)
• A15 CPU Board (including rear-panel interconnects)
• A40 Floppy Disk Drive
• A41 Hard Disk Drive
• EPROMs (on the A10 frequency reference board and the A16 test set motherboard)
A6 SPAM Board (Digital Description)
The A6 SPAM board contains digital and analog circuitry. For analog descriptions, refer to
"A6 SPAM Board (Analog Description)" on page
The digital signal processor (DSP) receives digitized data from the digital circuitry of the
A6 SPAM board. It computes discrete Fourier transforms to extract the complex phase and
magnitude data from the receiver IF signal. The resulting raw data is written into the
main random access memory (RAM) located on the CPU board. The data taking sequence
is triggered either externally from the rear panel or by firmware on the A15 CPU board.
A15 CPU Board
The A15 CPU board contains the circuitry to control the operation of the analyzer. Some of
the components include the central processing unit (CPU), memory (EEPROM, ROM,
RAM), bus lines to other board assemblies, and connections to the rear panel. Some of the
main components are described next:
• CPU
• Main RAM
• Rear Panel Interconnects
CPU The central processing unit (CPU) is a microprocessor that maintains digital control
over the entire instrument through the instrument bus. The CPU receives external control
information from the keypad, any USB device, LAN or GPIB, and performs processing and
formatting operations on the raw data in the main RAM. It controls the DSP, the video
processor, and the interconnect port interfaces. In addition, when the analyzer is in the
system controller mode, the CPU controls peripheral devices through the peripheral port
interfaces.
Front panel settings are stored in SRAM, with a battery providing at least five years of
backup storage when external power is off.
Main RAM The main random access memory (RAM) is shared memory for the CPU and
the DSP. It stores the raw data received from the DSP while additional calculations are
performed on it by the CPU. The CPU reads the resulting formatted data from the main
RAM, converts it to a user-definable display format, and writes this to the video processor
for display.
5-26
PNA Series Microwave Network Analyzers
5-22.
Service Guide E8364-90001
E8362A, E8363A, E8364A