Forced Transition Execute & Cancel Instructions (S, R) - Mitsubishi Q series Programming Manual

4 SFC PROGRAM CONFIGURATION
4.4.9 Forced transition EXECUTE & CANCEL instructions (s, r)
Internal Device
File
(System, User)
Register
R
Bit Word
D
s D (TRn)
s D (BLm\TRn)
[Function]
(1) Forced transition EXECUTE instruction (s)
(a) A specified transition condition in a specified block is forcibly satisfied, and an unconditional
transition is executed at the step which precedes the condition.
(b) After execution of the instruction, the forced transition status remains effective until a reset
instruction is executed.
(2) Forced transition CANCEL instruction (r)
(a) Cancels the forced transition setting (designated by SET instruction) at a transition
condition, and restores the transition condition ladder created by the user.
(3) Specify the transition condition as described below.
(a) In the case of SFC program
• Use "TRn" when specifying the transition condition in the current block.
• Use "BLm \TRn" when specifying the transition condition in another block.
(b) In the case of sequence program
• Use "BLm \TRn" when executing the forced transition EXECUTE/CANCEL instruction in
the sequence program.
• When the block number is not specified, specify the block number with the BRSET
instruction.
However, the BRSET instruction cannot be used for the Basic model QCPU and
Universal model QCPU.
"Block 0" is set when the block nomber is not specified for the Basic model QCPU and
Universal model QCPU.
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Usable Devices
Link Direct Intelligent
J \ Function Index
Module Z
Bit Word
U \G
n is the transition condition No.
m is the block No.
User setting Continuous transition prevention
Transition condition & aSM324
Applicable
Basic
CPU
Data
Expansion
Constant Other
Type
SFC
K, H TRn
BLm\TRn
Device
name
r D
r D
| Always ON
(Condition image by instruction execution)
QCPU
PLC CPU
Universal
High Performance
Programs Using Instructions
SFC Program
Sequence
Program
Transition
Step
Condition
(TRn)
n is the transition condition No.
(BLm\TRn)
m is the block No.
MELSEC-Q
Process Redundant
CPU CPU
Execution Site
Transition
Block Step
Condition
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