P0 Port Key-Entry Reset; Reset By Watchdog Timer - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
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5 INITIAL RESET

5.1.2 P0 Port Key-Entry Reset

Initial resetting is possible by inputting external Low level simultaneously to the ports (P00 to P03) selected by
software. The ports can be selected by P0KRST[1:0] (D[1:0]/P0_KRST register).
∗ P0KRST[1:0]: P0 Port Key-Entry Reset Configuration Bits in the P0 Port Key-Entry Reset Configuration
(P0_KRST) Register (D[1:0]/0x5209)
For example, initial reset is applied when input to the four ports P00 to P03 is Low level simultaneously if
P0KRST[1:0] is set to 0x3.
Note: • Make sure the specified ports are not simultaneously switched to Low during normal op-
erations when using the P0 port key-entry reset function.
• The P0 port key-entry reset function is enabled by software and cannot be used to perform
a reset at power-on.
• The P0 port key-entry reset function cannot be used in SLEEP state.

5.1.3 Reset by Watchdog Timer

The S1C17001 incorporates a watchdog timer to detect runaway CPU. If the watchdog timer is not reset by soft-
ware every 4 seconds (with this failure indicating a runaway CPU), the timer overflows, generating an NMI or re-
set. A reset is generated by writing "1" to WDTMD (D1/WDT_ST register). (NMI is generated if WDTMD is 0.)
∗WDTMD: NMI/Reset Mode Select Bit in the Watchdog Timer Status (WDT_ST) Register (D1/0x5041)
For detailed information on the watchdog timer, refer to "17 Watchdog Timer (WDT)."
Note: • When using the reset function with the watchdog timer, to prevent accidental resetting, take
care to program so that the watchdog timer is reset every four seconds.
• The watchdog timer reset function is enabled by software and cannot be used to perform a
reset at power-on.
26
Table 5.1.2.1: P0 port key-entry reset settings
P0KRST[1:0]
0x3
P00, P01, P02, P03
0x2
0x1
0x0
EPSON
Port used
P00, P01, P02
P00, P01
Not used
S1C17001 TECHNICAL MANUAL

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