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[2] Circuit description of control PWB
1.
General description
Fig. 2 shows the functional blocks of the control PWB, which
posed of 5 blocks.
is com-
Fig. 2 Control PWB functional block diagram
2. Description of
each block
(1) Main control block
The
main
control
block is composed of an 8-bit microprocessor
Z80180, ROM (128KByte), and RAM (8KByte+2KByte). Devices are
connected to the bus to control the whole unit.
1)
Z80180 (IC2) ... pin-80 QFP (CPU)
This is a CMOS 8-bit microprocessor. A high-speed CPU (compatible
with Z80 upper class models) and peripheral functions are incorpo-
rated in one chip.
This system allows the following functions.
Memory Management Unit (MMU)
DMA controller (2 channels); Channel O: For read, Channel 1: For
write.
Timer
Interruption; As external interrupt.
INTO:Modem interrupt
INTI: Not used
INT2: Mechanism control section/RTC detection interrupt.
Operating speed is 6MHz.
In addition, 12MHz clock is supplied from external clock input pin 76
as the basic clock of the modem (ICI).
For reset when power is turned on, a LOW signal of about 200msec
is supplied to RESET terminal.
2) 27CO1O (IC9):
pin-32 DIP (ROM)
EPROM of 1Mbit equipped with software for the main CPU.
3) LH5160 (IC4): pin-28, SOP (RAM)
Line memory for the main CPU system RAM area and coding/decod-
ing process. Used as the transmission buffer.
Memory of recorded data such as daily report and auto dials. When
the power is turned off, this memory is backed up by the lithium
battery.
4)LH5116 (IC6): Pin-24 SOP (RAM)
Work area for main program.
This IC is not backed up by the lithium battery.
FO-145A
5)
LZ9FJ11 (IC5): pin-160, QFP (Gate Array)
The following functions are incorporated to support the CPU.
b
CPU l/F and register
1/0 port
CPU timer
Read system control
Memory mapping
Mechanism/recording control block
Modem l/F (RTC detection)
Cutier control
Real time clock l/F
6) NJU6355E (ICIOI): pin-8, SOP
The following functions are incorporated to support the CPU (lC2j.
Timer
Calendar
Battery backup for power off
5-2
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