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3.Pin function (MN103S28EGA : 4/4)
Symbol
Pin No.
155
VSS
156
VDD3
157
HDD1
158
HDD13
159
HDD2
160
HDD12
161
HDD3
162
VDD3
163
VSS
164
HDD11
165
HDD4
166
HDD10
167
HDD5
168
HDD9
169
VDD3
170
VSS
171~173
HDD6~8
174
VDDH
175
NRESET
176
MASTER
74VHC74MTC-X (IC454) : ZIVA Wait
1.Terminal layout
1
CLR1
2
D1
CK1 D1
3
CK1
PR1CLR1
4
Q1 Q1
PR1
5
Q1
6
D2
CK2
Q1
PR2CLR2
7
GND
Q2 Q2
3.Pin function
Symbol
I/O
Pin No.
1
CLR1
I
2
D1
I
3
CK1
I
4
PR1
I
5
Q1
O
6
Q1
O
7
GND
-
I/O
-
Connect to ground
-
Power supply terminal for I/O (3.3V)
I/O
ATAPI host data 1
I/O
ATAPI host data 13
I/O
ATAPI host data 2
I/O
ATAPI host data 12
I/O
ATAPI host data 3
-
Power supply terminal for I/O (3.3V)
-
Connect to ground
I/O
ATAPI host data 11
I/O
ATAPI host data 4
I/O
ATAPI host data 10
I/O
ATAPI host data 5
I/O
ATAPI host data 9
-
Power supply terminal for I/O (3.3V)
-
Connect to ground
I/O
ATAPI host data 6~8
-
Reference power supply for ATAPI (5.0V)
I
ATAPI host reset input
I
ATAPI master / slave select
2.Trouth table
14
Vcc
13
CLR2
CLR
PR
12
D2
L
H
11
CK2
H
10
PR2
L
9
Q2
H
H
8
Q2
H
H
H
H
Description
Pin No.
Direct clear input 1
Data input 1
Clock pulse input 1
Direct preset input 1
Output
Output
Connect to ground
Description
Input
D
CK
Q
X
X
L
L
X
X
H
L
X
X
H(Note 1)
L
L
H
H
X
Qn
Symbol
I/O
8
Q2
O
Output
9
Q2
O
Output
10
PR2
I
Direct preset input 2
11
CK2
I
Click pulse input 2
12
D2
I
Data input 2
13
CLR2
I
Clock clear input 2
14
VCC
-
Power supply
Output
Function
Q
H
Clear
L
Preset
H(Note 1)
H
L
Qn
No change
Description
XV-LTR1
1-33
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