Table of Contents
Advertisement
Instruction Set
BIS[.W]
BIS.B
Syntax
Operation
Description
Status Bits
Mode Bits
Example
Example
3-26
RISC 16-Bit CPU
Set bits in destination
Set bits in destination
BIS
src,dst
BIS.B
src,dst
src .OR. dst −> dst
The source operand and the destination operand are logically ORed. The
result is placed into the destination. The source operand is not affected.
Status bits are not affected.
OSCOFF, CPUOFF, and GIE are not affected.
The six LSBs of the RAM word TOM are set.
BIS
#003Fh,TOM; set the six LSBs in RAM location TOM
The three MSBs of RAM byte TOM are set.
BIS.B
#0E0h,TOM
or BIS.W
src,dst
; set the 3 MSBs in RAM location TOM
Advertisement
Table of Contents
