Frequency Synthesizer Circuits; Voltage Diagrams - Icom IC-F4101D Service Manual

350-470 mhz range
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MODULATION CIRCUIT
The modulation signal from the TX AF circuits is applied to
D15 of the TX VCO (Q14, D14–D16) to modulate it (FM for
the analog mode, 4FSK for the digital mode). The modulated
signal from the TX VCO is buffer-amplified by two buffers
(Q8, Q10), and applied to the TX AMP circuits through the
LO SW (D5).
• MODULATION CIRCUIT
Q10
Q8
TX VCO
Q14,
BUFF
BUFF
D14,D16,D17
D15
MODULATION FM:Analog
4-FSK: Digital
MOD
From the TX AF circuits
TX AMPLIFIERS
The buffer amplifi ed signal from the LO SW (D5) is sequen-
tially amplified by the pre-AMP (Q4), pre-drive AMP (Q3),
drive AMP (Q2), and power AMP (Q1), to obtain TX power.
The amplifi ed TX signal is passed through the antenna SW
(D3, D22) and the LPF, which eliminates harmonics, and
then fed to the antenna.
APC CIRCUITS
D1 and D2 rectify a portion of the TX signal to direct voltage,
and the APC AMP (IC1) compares the voltage and the TX
power control reference voltage, "T1." The resulting voltage
controls the gain of the power and drive AMPs to keep the
TX power constant.
• TX AMPLIFIERS AND APC CIRCUITS
Q4
Q3
Q2
From the
TX VCO
PRE
PRE
DRIVE
AMP
DRIVE
AM P
D5
To the TX AMP circuits
LO
SW
D1,D22
Q1
ANT
PWR
LPF
AM P
SW
IC1
APC
PWR
D1,D2
AMP
T1
DET
Q6
TMUT
MUTE
To the RX circuits
SW

4-3 FREQUENCY SYNTHESIZER CIRCUITS

The RX VCO is composed of Q13, and D11, D12. The VCO
output signal is buffer-amplifi ed by two buffers (Q8 and Q10)
and applied to the 1st IF mixer, through the LO SW (D6) and
the LPF (L18, C208, C209).
The TX VCO is composed of Q14 and D14–D17. The VCO
output signal is buffer-amplifi ed by two buffers (Q8 and Q10)
and applied to the pre-AMP (Q4), through the LO SW (D5)
and the LPF.
A portion of signal generated by each VCO is fed back to
the PLL IC (IC4, pin 17) through the buffer (Q9) and the LPF
(L46, C167, C168).
The applied VCO output signal is divided and phase-com-
pared with a 15.3 MHz reference frequency signal from the
TCXO (X2), which is also divided. The resulting signal is
output from the PLL IC (IC4), and DC-converted by the loop
fi lter, and then applied to the VCO as the lock voltage.
When the oscillation frequency drifts, its phase changes
from that of the reference frequency, causing a lock voltage
change to compensate for the drift in the VCO oscillating fre-
quency.
• FREQUENCY SYNTHESIZER CIRCUITS
X2
IC60
BAL
15.3MHz
BUFF
TCXO
REF
Q26
IC4
PLL
X3
IC
ANT
SO,SCL,PLST
45.9MHz
IF IC
BPF
IC3

5-4 VOLTAGE DIAGRAMS

VCC
POSWH
VCC
Q92,
POWER
Q93,
D59
SW
+3.3V
4 - 3
D11
RX VCO
Q13,D12
LV
ADJ
LOOP
LV
FILTER
Q10
Q8
BUFF
BUFF
D14
TX VCO
LVA
LV
ADJ
Q14,D16
Q9
LPF
BUFF
Q71 ,Q86
S5C
S5
S5V
TX/RX common circuits
REG
Q72,Q87
IC54
RXC
R5
R5V
Receive circuits
+5V
REG
REG
Q73,Q88
TXC
T5
T5V
Transmit circuits
REG
+5V
TX/RX common circuits
IC65
DC-DC
CPUV
Logic circuits
3.3V
Q90,Q91
+3.3V
+3.3V
REG
PWON
LINE
FILTER
DVDD_3.3V
LIN E
DSP flash
FILTER
LINE
3.3V_VD D
DSP
FILTER
LINE
+3.3V_A
Liner codec
FILTER
IC900
DC-DC
CVDD_1.6 V
DSP reference voltage
1.6V
CPUV
D5,D6
LO
To the TX AMPs
SW
LPF
Q23
1st IF mixer

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