6.3.6.
Reset Circuit (Watch dog timer)
The output signal (reset) from pin 2 of the voltage detect IC (IC505) is input to the ASIC (IC501) 114 pin.
1. During a momentary power interruption, a reset pulse of 60 msec is generated and the system is reset completely.
2. The watch dog timer, built-in the ASIC (IC501), is initialized by the CPU about every 1.5 ms.
When a watch dog error occurs, pin 115 of the ASIC (IC501) becomes low level.
The terminal of the 'WDERR' signal is connected to the reset line, so the 'WDERR' signal works as the reset signal.
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KX-FG2452CX