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4-1-6 SQUELCH CIRCUIT (RF AND MAIN UNITS)
(1) NOISE SQUELCH
The noise squelch circuit cuts out AF signals when no RF
signals are received. By detecting noise components in the
AF signals, the squelch circuit switches the AF mute switch.
A portion of the AF signals from the FM IF IC (RF unit; IC2,
pin 9) are applied to the active filter section (RF unit; IC2,
pin 8). The active filter section amplifies and filters noise
components. The filtered signals are applied to the noise
detector section and output from pin 14 as the "SQLIN" sig-
nal.
The "SQLIN" signal from IC2 (pin 14) passes through J300,
pin 12, and is then applied to the CPU (MAIN unit; IC301, pin
46). The CPU analyzes the noise condition and outputs the
"RMUT" and "AFON" signals to toggle the volume mute
(MAIN unit; Q316) and AF mute (MAIN unit; Q311) switches.
(2) TONE SQUELCH
The tone squelch circuit detects AF signals and opens the
squelch only when receiving a signal containing a matching
subaudible tone (CTCSS). When tone squelch is in use, and
a signal with a mismatched or no subaudible tone is
received, the tone squelch circuit mutes the AF signals even
when noise squelch is open.
A portion of the AF signals from the FM IF IC (RF unit; IC1,
pin 9) passes through the AF control (MAIN unit; IC304) to
control the volume mute and AF mute switches.
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(MAIN UNIT)
AF signals from the internal/external microphone are applied
to the microphone amplifier circuit and low-pass filter
(IC304) via the microphone switch (Q313). The filiterd audio
signals are applied to the modulation circuit on the RF unit
via J300, pin 15 as the "MOD" signal.
2-2 MODULATION CIRCUIT (RF UNIT)
The filtered audio signals from J300, pin 15 (On the MAIN
unit) are applied to the modulation circuit (D8, D9) to modu-
late transmit signals at the VCO circuit (Q8).
The modulated signal is applied to the drive amplifier circuit.
Loop
filter
to the FM IF IC
(IC1, pin1)
X2
21.25 MHz
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
The amplifier circuit amplifies the VCO oscillating signal to
the output power level.
The amplified transmit signal is passed through the antenna
switching circuit (D1) and low-pass filter, and is then applied
to the antenna.
The modulated transmit signal is amplified at the pre-drive
and drive amplifiers (Q5, Q6) after being amplified at the
buffer amplifier (Q8). The amplified signal is power amplified
at the power amplifier (Q4) to obtain 10 mW of RF power.
The power amplified signal is then applied to the antenna via
the low-pass filter circuits.
4-3 PLL CIRCUITS (RF UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and receive 1st LO frequency. The PLL output com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by
the divided ratio (N-data) of a programmable divider.
The PLL circuit consists of the VCO circuit (Q8, D8, D9). An
oscillated signal from the VCO passes through the buffer
amplifier (Q7) is applied to the PLL IC (IC2, pin16) and is
prescaled in the PLL IC based on the divided ratio (N-data).
The reference signal is generated at the reference oscillator
(X2) and is also applied to the PLL IC. The PLL IC detects
the out-of-step phase using the reference frequency and
outputs it from pin 14. The output signal is passed through
the loop filter (R44, C67) and is then applied to the VCO cir-
cuit as the lock voltage.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
RX VCO
Buffer
Q7
Q8, D8, D9
Phase
Programmable
14
detector
counter
9
Programmable
divider
11
4 - 2
(RF UNIT)
IC2 TB31202FN
16
Prescaler
6
7
Shift register
8
D6
to 1st mixer circuit
D7
to transmitter circuit
CK
DATA
STB
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