Theory Of Operation; Phase-Locked Loop (Pll) - Standard Horizon GX1250SA Service Manual

2. THEORY OF OPERATION

2.1 Phase-Locked Loop (PLL)

Refer to Figure 2-1.
The Phase-locked loop (PLL) consists of VCO ZZ01, reference oscillator XP01, PLL IC QP02, and PLL loop filter QP04 and QP05.
The microprocessor QL01 supplies the data, clock, and strobe signals determined by the operating frequency set by the UP/
DOWN keys. This data is output from pins 14, 15, and 16 of microprocessor QL01 and applied to pins 9, 10, and 11 of PLL IC QP02.
The first local oscillator frequency is output from YY03 of VCO ZZ01 (TX LO = TX Frequency RX LO = RX Frequency -21.4 MHz).
2.1.1 Programmable Divider
The microprocessor QL01 determines a divide-by number (N)
which is sent to PLL IC QP02. Inside QP02, the programmable
divider divides the VCO frequency by N after being supplied
to the divide-by-64 prescaler to produce 5kHz signal. Chang-
ing the operating frequency will cause the N number from the
microprocessor QL01 and the frequency from the prescaler to
the programmable divider to change so that the programmable
divider is consistently providing 5kHz signal to the phase de-
tector.
2.1.2 Phase Detector
The phase detector compare between frequency from the pro-
grammable divider (fp) and the reference frequency (fr).
2.1.3 Reference Divider
The 21.855 MHz frequency produced by the crystal oscillator
XP01 passes through pin 1 of PLL IC QP02 and applied to the
reference divider. The reference frequency (5 kHz) is produced
by dividing the reference oscillator frequency by 4371. It is
then applied to the phase detector in QP02.
VCO
ZZ01
Fin AMP
QP01
PLL IC
QP02
MB87014
Prescaler
8
1/64
5 kHz (fp)
Phase
Charge
detector
Pump
7
12
PLL loop filter
QP04 - 2SC2712
QP05 - 2SC2712
Figure 2-1 PLL block diagram
1st Local signal
Transmission signal
Microprocessor
QL01
16
15 14
10
9 11
Programmable
divider
1/N
Reference
5 kHz (fr)
divider
1/4371
1 2
Crystal oscillator
XP01
21.855 MHz
2.1.4 PLL Loop Filter
The PLL loop filter is a low pass filter comprised of QP04 and
QP05. It eliminates any frequency components that may be
present in the voltage output from pins 12 of PLL IC QP02.
The filtered voltage is then fed to YY07 of VCO ZZ01.
2.1.5 V oltage-Controlled Oscillator (VCO)
During receive, pin 3 of microprocessor QL01 outputs a high
voltage (5 V) which allows the 8 V regulator Q201 to supply
RX+B to YY04 of VCO ZZ01 through Q202. During receive,
the first LO signal from YY03 of VCO ZZ01 is applied to the
first local amplifier QR05 for amplification.
During transmit, pin 3 of microprocessor QL01 outputs a low
voltage (0 V) to the base of TX +B switch Q204 which turns off
RX +B switch Q202 and allows the voltage to pass through
Q204 and be applied to YY05 of VCO ZZ01. Also during trans-
mit, the audio signal supplied from the microphone is ampli-
fied by microphone amp QM02 then applied to RM12 for de-
viation adjustment. The signal is then applied to YY05 termi-
nal of VCO ZZ01 which modulates the transmit signal. The
output from YY03 of VCO ZZ01 is applied to TX amplifier pre-
driver QT01, in the transmitter circuit, to be amplified.
3
Unlock
13