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SD-AS10
IC114
STG3157C
HIGH SPEED
SWITCH
1
6
2
5
3
4
1
6
2
5
3
4
IC115
STG3157C
HIGH SPEED
SWITCH
1
6
2
5
3
4
IC116
STG3157C
HIGH SPEED
SWITCH
6
2
1
5
_DSP_SCCLK
SCCLK
7
EMAD7
D7
8
EMAD6
SCDIN
D6
6
9
39 AUDATA2
EMAD5
D5
10
40
EMAD4
11
D4
IC101
+2.5V(D)
12
VD2
CS493264
13
DGND2
DSP
EMAD3
D3
14
EMAD2
15
D2
EMAD1
16
D1
EMAD0
17
D0
18 19 20 21 22 23 24 25 26 27 28
IC105
LC83210W
DVS
48 47 46 45
44 43
41
40 39
37
VDD(I/O)
1
VSS5
SDO
2
SDI0(L/R)
3
4
SDI1(LS/RS)
SDI2(C/LFE)
TEST
5
BIST_FAIL
VSS1
6
VSS4
LRCLOCK
7
PRG4
SCLOCK(BITCLOCK)
8
PRG3
TEST
9
(BIST_MODE)
TEST
10
(SCAN_EN)
TEST
11
(SCAN_MODE)
12
AVSS
13
17
19 20 21
24
Figure 4-7 BLOCK DIAGRAM (7/18)
4 – 7
44 43 42 41 40
39
RESET
36
AUDATA1
AGND
35
VA
34
28
SCLKN2
LRCLKN2
CLKSEL
29
31
CLKIN
30
29
+2.5V(A)
2
36
32
31
30
29
PRG2
28
PRG1
27
PRG0
26
VDD4
25
L110
EX_CLK
IC
1
2
4
74V
INV
RES
8
7 6
+3.3V(D)
5
7
6
4
3
2
8
9
11 12 13
+2.5V(D)
+3.3V(D)
3
3
2
2
1
1
IC112
L4931Z33
3.3V REGULATO
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