Sony HDR-XR500 Service Manual page 50

Digital hd video camera recorder
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Ver. 1.1 2009.02
The changed portions from
Ver. 1.0 are shown in blue.
3-3. OVERALL BLOCK DIAGRAM (3/8)
FR-298 BOARD
FP-1037
FLEXIBLE
SE6601
BOARD
CN6601
YAW_AD
10
13
PITCH_AD
13
11
PITCH/YAW
SENSOR
VST_C_RESET_P
6
10
VST_C_RESET_Y
16
12
IC6601
g
SIRCS
SIRCS_SIG
4
1
(REMOTE SENSOR)
RECEIVER
NS_K
7
D6601
NS_A
(NIGHTSHOT)
6
XTALLY_LED
2
D_2.8V
D6602
5
(TALLY)
R6607
HDR-XR500/XR500E/XR500V/XR500VE/
XR520/XR520E/XR520V/XR520VE_L2
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
VC-557 BOARD (3/4)
SE3202
IC1701
GSENS_X
8
AG35
8
3 AXIS
GSENS_Y
9
AF35
9
ACCELEROMETOR
GSENS_Z
(CAMERA SIGNAL
G SENSOR
10
AK35
10
PROCESS,
CAMERA CONTROL)
A_2.8V
(5/14, 6/14, 7/14)
R3205
GSENS_REF
AL33
10
R3204
XPON_SW
OVERALL (4/8)
7
C30
(PAGE 3-4)
CN1004
YAW_AD
2
PITCH_AD
4
8
OVERALL (4/8)
VST_C_RESET_PITCH
(PAGE 3-4)
5
VST_C_RESET_YAW
3
SIRCS_SIG
14
Y3
Q1002
IR_LED_ON
OVERALL (4/8)
9
SWITCH
(PAGE 3-4)
NS_LED_K
8
R1006,
R1007
NS_LED_A
9
D_2.8V
XTALLY_LED
13
H17
10
D_2.8V
08
CLK_SYS_OUT_CEC
SPDIF_O
PCI_BUS
IC1702
WAVEFORM SHAPER
(5/14)
SPDIF_O
CLK_SYS_OUT_IC_2201
3
4
(3/3)
B3
CPU
A_2.8V
X1701
12MHz
PCI_AD0 - PCI_AD31
PCI_AD0 - PCI_AD31
PCI_AD12
PCI_AD11
AN15
PCI_XBE0 - PCI_XBE3
PCI_XBE0 - PCI_XBE3
PCI_CLKRUN
PCI_CLKRUN
AM19
PCI_PAR
PCI_PAR
AM15
PCI_XFRM
PCI_XFRM
AN13
PCI_XTRDY
PCI_XTRDY
AN14
PCI_XSERR
PCI_XSERR
AM13
PCI_XDEVSEL
PCI_XDEVSEL
AM14
PCI_XPERR
PCI_XPERR
AN17
PCI_XSTOP
PCI_XSTOP
AR19
PCI_XIRDY
PCI_XIRDY
AR21
PCI_XRESET
PCI_XRESET
AP19
PCI_CLK
PCI_CLK
AR16
AR17
PCI_XREQFS0_AN
PCI_XREQFS0_AN
AM20
PCI_XGNTTS0_AN
PCI_XGNTTS0_AN
AP17
PCI_XREQFS1_AR
AN20
PCI_XGNTTS1_AR
AP18
PCI_XINTA_AN
PCI_XINTA_AN
AR20
PCI_XINTB_AR
AM21
IC_2201_DATA0 - IC_2201_DATA7
IC_2201_FLD, IC_2201_IVCLK,
IC_2201_MCK, IC_2201_LRCK
IC_2201_ADATA
J33
IC_2201_SYSCLK
L35
3-3
PCI_AD0 - PCI_AD31
PCI_AD13
OVERALL (2/8)
10
(PAGE 3-2)
PCI_XBE0 - PCI_XBE3
PCI_CLKRUN
PCI_PAR
PCI_XFRM
PCI_XTRDY
PCI_XSERR
AA17
PCI_XDEVSEL
AC12
IC2201
PCI_XPERR
PCI PROCESSOR
PCI_XSTOP
(9/14)
PCI_XIRDY
PCI_XRESET
PCI_CLK
PCI_XREQFS1_AR
PCI_XGNTTS1_AR
PCI_XINTB_AR
E3
IC_2201_DDR_D00 - IC_2201_DDR_D31
A4
M4
K2
IC_2201_DDR_A00 - IC_2201_DDR_A13
K4
M1
L2
M2
K3
IC_2201_DDR_DQS0 - IC_2201_DDR_DQS3,
IC_2201_DDR_DQM0 - IC_2201_DDR_DQM3
K1
H1
J1
XIC_2201_DDR_CLK, IC_2201_DDR_CLK,
XIC_2201_DDR_CS0, XIC_2201_DDR_RAS,
B2
XIC_2201_DDR_CAS, XIC_2201_DDR_WE,
IC_2201_DDR_CKE1, IC_2201_DDR_BA0,
B3
IC_2201_DDR_BA1
A3
AA16
AC13
N2
IC1301
N1
(2/3)
L5
CPU
(SIGNAL
M5
PROCESS)
L2
(2/14, 3/14)
N7
L1
P7
M1
BARRIER_PWM
P4
AF1
6
BARRIER_EN
N5
AH5
P2
OVERALL (4/8)
N4
(PAGE 3-4)
M2
P5
IC2301
DDR SDRAM
(10/14)

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