Lsi Pin Description - Yamaha CLAVINOVA CVP-105 Service Manual

LSI PIN DESCRIPTION

HD6437043AF09 (XV664100) CPU
PIN
NAME I/O
NO.
1 /WRHH O
2 PE14 O
3 /WRHL O
4 CASHH/PA21
I/O
DACK1/PE15
5 O
6 VSS I
7 A0 O
8 A1 O
9 A2 O
10 A3 O
11 A4 O
12 VCC I
13 A5 O
14 VSS I
15 A6 O
16 A7 O
17 A8 O
18 A9 O
19 A10 O
20 A11 O
21 A12 O
22 A13 O
23 A14 O
24 A15 O
25 A16 O
26 VCC I
27 A17 O
28 VSS I
29 /CASHL/PA20
I/O
30 PA19 I/O
31 /RAS/PB2 O
32 /CASL/PB3 O
33 PA18 I/O
34 /CASH/PB4 O
35 VSS I
36 RDWR/PB5 O
37 A18 O
38 A19 O
39 A20 O
40 VCC I
41 A21 O
42 VSS I
43 /RD O
44 /WDTOVF O
45 D31 I/O
46 D30 I/O
47 /WRH O
48 /WRL O
49 /CS1 O
50 /CS0 O
51 /IRQ3/PA9 I/O
52 /IRQ2/PA8 I/O
53 /CS3 O
54 /CS2 O
55 VSS I
56 D29 I/O
57 D28 I/O
58 D27 I/O
59 D26 I/O
60 D25 I/O
61 VSS I
62 D24 I/O
63 VCC I
64 D23 I/O
65 D22 I/O
66 D21 I/O
67 D20 I/O
68 D19 I/O
69 D18 I/O
70 D17 I/O
71 VSS I
72 D16 I/O
FUNCTION
HH write
Port E
H L write
HH Column address strobe/Port A
DMA transfer strobe/Port E
Ground
Address bus
Power supply
Address bus
Ground
Address bus
Power supply
Address bus
Ground
HL Column address strobe/Port A
Port A
Row address strobe/Port B
Column address strobe (low) /Port B
Port A
Column address strobe (high) /Port B
Ground
DRAM read/write /Port B
Address bus
Power supply
Address bus
Ground
Read
Watch dog timer overflow
Data bus
Data bus
High write
Low write
Chip select
Chip select
Interrupt request/Port A
Interrupt request/Port A
Chip select
Chip select
Ground
Data bus
Ground
Data bus
Power supply
Data bus
Ground
Data bus
PIN
NAME I/O
NO.
73 D15 I/O
74 D14 I/O
75 D13 I/O
76 D12 I/O
77 VCC I
78 D11 I/O
79 VSS I
80 D10 I/O
81 D9 I/O
82 D8 I/O
83 D7 I/O
84 D6 I/O
85 VCC I
86 D5 I/O
87 VSS I
88 D4 I/O
89 D3 I/O
90 D2 I/O
91 D1 I/O
92 D0 I/O
93 VSS I
94 XTAL I
95 MD3 I
96 EXTAL I
97 MD2 I
98 NMI -
99 VCC I
100 PA16 I/O
101 PA17 I/O
102 MD1 I
103 MD0 I
104 PLLVCC I
105 PLLCAP I
106 PLLVSS I
107 CK/PA15 I/O
108 /RES I
109 TIOC0A/PE0 I/O
110 PE1 I/O
/DREQ1/PE2
111 I/O
112 VCC I
113 PE3 I/O
114 PE4 I/O
115 PE5 I/O
116 PE6 I/O
117 VSS I
118 AN0 /PF0 I
119 AN1/ PF1 I
120 AN2 /PF2 I
121 AN3 /PF3 I
122 AN4 /PF4 I
123 AN5/PF5 I
124 AVSS I
125 AN6/PF6 I
126 AN7/PF7 I
127 AVREF I
128 AVCC I
129 VSS I
130 RxDO I
131 TxDO O
132 /IRQ0/SCK0 I
133 RxD1 I
134 TxD1 I/O
135 VCC I
136 /IRQ1/SCK1 I
137 PE7 I/O
138 PE8 I/O
139 PE9 I/O
140 PE10 I/O
141 VSS I
142 PE11 I/O
143 PE12 I/O
144 PE13 I/O
CVP-105
DM : IC100
FUNCTION
Data bus
Power supply
Data bus
Ground
Data bus
Power supply
Data bus
Ground
Data bus
Ground
Crystal oscillator
Mode select
Crystal oscillator
Mode select
Non-maskable interrupt
Power supply
Port A
Port A
Mode select
Mode select
PLL Power supply
PLL capacitor
PLL Ground
Clock/Port A
Reset
MTU input capture/output compare (ch 0)/Port E
Port E
DMA transfer request/Port E
Power supply
Port E
Ground
Analog input/Port F
Analog ground
Analog input/ Port F
Analog input /Port F
Analog reference voltage
Analog power supply
Ground
Receive data
Transmit data
Interrupt request/Serial clock
Receive data
SCI
Power supply
Interrupt request/Serial clock
Port E
Ground
Port E
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