Chapter 5. Major Ic Informations; Major Ic Informations - Sharp TU-X1U Service Manual

TU-X1U
CHAPTER 5.
TUX1U

MAJOR IC INFORMATIONS

Service Manual
[1] MAJOR IC INFORMATIONS
IC1604 (VHiSii9185A-1Q)
This IC is TMDS switch device supporting Revision 1.3 of the HDMI Specification with three HDMI inputs and a signal output. This IC is used to select
a single set of HDMI/DVI signals from three HDMI/DVI receiver-ports and to generate a fully compliant HDMI/DVI stream as an output. This includes
DDC switching, Individual HPD control, and 5V sense. The HDMI output signal is sent to IC1502(HDMI receiver).
IC1701 (VHiSii9185A-1Q)
Please refer to the above sentence. This IC is used to select a single set of HDMI/DVI signals from two HDMI/DVI receiver-ports. The HDMI output
signal is sent to IC1604(TMDS switch).
IC1502(VHiSii9135A-1Q)
This IC is HDMI 1.3 receiver. This is used to select either the signal from IC 1604 or the HDMI signal from Input1. In addition, this IC is used to convert
TMDS into 30-bit digital signal (RGB/YCbCr) and outputs them to IC 8001.
IC1307 (VHiAK4683EQ-1Q)
This IC is used for OPT output. S/PDIF signal from IC8001 is converted into I2S signal by this IC. I2S signal is sent to IC1305,IC1306 (I2S delay IC)
to adjust time difference between video and audio and the return-signal is converted into S/PDIF again by IC1307. Finally, IC1307 sends the signal to
OPT connector.
IC1403 (VHiAK4682AE-1Y)
This IC provides for 2-channel A/D and 4-channel D/A (192-kHz sampling). The analog audio signal from each input (INPUT1,2,3 (analog audio for
Composite, component, S-terminal) or INPUT-6 (HDMI-analog audio) or INPUT-7 (RGB-analog audio)) is fed into this IC for selection. The selected
signal is converted into digital signal (I2S) and flows into the video signal processing circuit IC8001 (RH-iXC552WJQZQ). I2S signal which is pro-
cessed by DSP included in IC8001 is sent to IC4504 for HDMI output or returns to IC1403 for analog-audio output.
IC4601 (RH-iXC423WJQZQ)
This IC is FPGAs and is designed to have the function to convert LVDS which IC 8001 outputs into 30bit digital signal (RGB, YCbCr). These signals
are sent to IC4504 (HDMI_Tx).
IC4504 (VHiSii9134+-1Q)
This IC is HDMI Transmitter supporting the DHMI 1.3. This IC receives 30bit digital signals which IC8001 outputs and outputs TMDS to HDMI connec-
tor (SC4501). This IC comes pre-programmed with HDCP keys and provides the highest level of HDCP key security available. This IC is capable of
supporting the resolutions of up to 1080p.
IC2002 (RH-iXC331WJN1Q)
The monitor microprocessor is intended to communicate with the main microprocessor and to operate the system. It also controls power of the entire
system.
IC8001 (RH-iXC552WJQZQ)
This LSI is FULL HIGH-DEFINITION 1080P DIGITAL TV SYSTEM-ON-A-CHIP. It combines a cable/terrestrial 4/1024-QAM and 8/16-VSB receiver, a
transport processor, a digital audio processor, a high definition (HD) MPEG video decoder, 2D graphics processing, digital processing of analog video
and audio, analog video digitizer and DAC functions, stereo high-fidelity audio DACs, two HDMI receivers for 1080p60 inputs, a 330-MHz millions of
instructions per second (MIPS) processor, and a peripheral control unit providing a variety of television control functions. The cable/terrestrial receiver
directly samples a tuner output with an analog-to-digital (ADC) converter. The LSI digitally resamples and demodulates the signal with recovered
clock and carrier timing, filters and equalizes the data, and passes soft decisions to an ATSC A/53 and ITU-T J.83 Annex A/B/C-compatible decoder.
It has an MPEG-2 Digital Video Broadcasting (DVB)-compliant transport processor with advanced section filtering capability, DVB descrambler, and
an MPEG-2 (MP@HL profile) video decoder. Audio support includes a BTSC and a Dolby AC3/MPEG-2 Layer 1, 2, audio decoder. The LSI provides
analog and digital audio/video outputs. A SPDIF output and a pair of analog outputs (L-R) are provided via the integrated audio DACs. The NTSC
analog video decoder is supported by its own motion adaptive deinterlacing and 3D comb filtering, including 1080i deinterlacing. The LSI includes
advanced 2D graphics processing. Two transport stream inputs are included. The LSI incorporates a complete MIPS32(r)-based microprocessor sub-
system including caches with bridging to memory and a local bus, where external peripherals can be attached. Integrated peripherals include two
USB 2.0, three UARTs, counter/timers and GPIO controllers.
IC8151,IC8152,IC8153,IC8154(RH-iXC187WJQZQ)
These ICs are 512Mb DDR. These have the function to store the temporary data IC8001 handles.
5 – 1