Denon DVD-3800 Service Manual page 25

Pin No. Pin Name I/O
59 PSYCN I Sync signal input
60 PDA8 I Parallel data 8 input
61 PDA7 I Parallel data 7 input
62 PDA6 I Parallel data 6 input
63 PDA5 I Parallel data 5 input
 GND pin
64 V
SS
65 PDA4 I Parallel data 4 input
66 PDA3 I Parallel data 3 input
67 PDA2 I Parallel data 2 input
68 PDA1 I Parallel data 1 input
69 PDA0 I Parallel data 0 input
 GND pin
70 V
SS
 
71 NC
 
72 NC
 
73 NC
74 AZCK I Ref. clock input for audio playback
75 ABCK O Bit clock (BCK) output for audio playback
76 ADO O Data output for audio playback
77 ACHCK O Channel clock (LRCK) output for audio playback
 Power pin
78 V
DD
79 SEDVD I Input IF select
 GND pin
80 V
SS
I/O µcom data in/output, tri-state output
81 MD0
I/O µcom data in/output, tri-state output
82 MD1
I/O µcom data in/output, tri-state output
83 MD2
I/O µcom data in/output, tri-state output
84 MD3
I/O µcom data in/output, tri-state output
85 MD4
I/O µcom data in/output, tri-state output
86 MD5
I/O µcom data in/output, tri-state output
87 MD6
I/O µcom data in/output, tri-state output
88 MD7
 GND pin
89 V
SS
 Power pin
90 V
DD
µcom address input
91 MA0 I
µcom address input
92 MA1 I
µcom address input
93 MA2 I
µcom address input
94 MA3 I
µcom address input
95 MA4 I
µcom address input
96 MA5 I
µcom address input
97 MA6 I
98 /MCE I Chip enable signal input
 µcom chip read signal input
99 /MRD
 GND pin
100 V
SS
µcom write signal input
101 /MWR I
O µcom interrupt signal output, open drain, pull-up R built-in
102 /MINT
103 TESTOUT O Output for test, leave it open
104 /RST I Hardware reset input (CMOS level), pull-up R built-in
 Power pin
105 V
DD
 GND pin
106 V
SS
 GND pin
107 V
SS
 
108 NC
 Power pin
109 V
DD
110 HD7 I/O
111 HD8 I/O
112 HD6 I/O
113 HD9 I/O Host data in/output (HD[0:15]:IDE sig. DD[0:15]), TTL level, tri-state out, pull-up R built-in
114 HD5 I/O
115 HD10 I/O
 GND pin
116 V
SS
Function
DVD-3800
25