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3. TECHNICAL BRIEF
DSP subsystem
It consists of ADI DSP, Viterbi coprocessor, Ciphering unit and a cache memory/controller system The
DSP can run at a maximum clock frequency of 91MHz at 1.8V The Viterbi and ciphering accelerators
enable a very efficient implementation of the channel equalization, encryption and decryption tasks
MCU subsystem
It consists of an ARM7TDMI central processing unit, a boot ROM, a clock generation and access
control module.
The system clock frequency for the ARM7TDMI is 13MHz at 1.8V.
The Clock & BS(Bus Select) generator module includes a clock multiplier with up to a 4X multiplication
factor, giving a maximum clock frequency of 52MHz. This allows optimization of the clock frequency
for the required MCU and memory performance.
The boot ROM contains MCU code for basic communication between the ARM and one of the serial
ports in the Universal System Connector subsystem.
Peripheral subsystem
It contains four major groups of elements.
The MMI group is a collection of all the functionality that are needed to implement a complete user
interface including keyboard, display, backlight, RTC, general purpose I/O etc. House Keeping group
consists of three different sub-modules: The Watch Dog Timer, the Interrupt Controller for interrupts to
MCU, DSP and DMA, and the General Timers.
GSM system group consists of the time base generation together with the synthesizer interface, which
form the radio control.
The Direct Memory Access interface, enables direct access capability to the DSP°Øs. internal
Program Memory and internal Data Memory from the Peripheral Subsystems.
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