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3. TECHNICAL BRIEF
3.6.1 Logic Explanation
AD6527
Figure 3: TOP LEVEL BLOCK DIAGRAM OF THE AD6527 INTERNAL ARCHITECTURE
AD6537
1) BUS Arbitration Subsystem
i. It is to work as a cross point for data accesses between the three main busses
ii. EBUS is for external accesses, primarily from Flash memory for code and data for the MCU and the
DSP processors.
iii. RBUS is for internal RAM access
iv. PBUS is for access to internal peripheral modules such as UART, RTC or SIM or Interrupt
Controller In addition to the three main system busses, it has SBUS, IOBUS and DMABUS
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