Signal Description - Sharp PC-1261 Service Manual

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Pin Signal
In/Out Function (standby
=
power off)
No. Name
1 A01 Out
Address bus line, high during standby
2 R/W Out Write clock signal, normally high
3 </JAL Out Low order bit address latch, normally high. The clock used to latch the low order 8 bits of the
16-bit address signal for the data bus I ine, when a large capacity ROM is used.
4 TES In Test input, normally low
5
</Ji
In Oscillator input
6
</ J o
Out Oscillator output
7
RES
In Reset input, normally pulled down to low level. Reset when high.
8 Xin In CE-125 microcassette option signal input (MTin)
9
ON In
ON (BREAK) key input, normally pulled down to low level
10 Xout Out CE-125 m icrocassette option signal and buzzer signal output (MTout1)
11 Dis Out
LCD driver control signal
12 HA Out LCD driver clock. Low during standby, and 2 kHz pulse is issued during displaying.
13 iA8 In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
14 iA7
In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
15 iA6 In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
16 iA5 In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
17
iA4
In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
18 iA3
In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
19 iA2 In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
20 iA1 In/Out Key input/key strobe output, normally low, but pulse issued with a key operation.
21 iB8 In
ACK signal which enables the 1/0 (PCU) to read data from the CPU.
22 iB7 In
Data in signal (Din) which is a serial data input from the PCU (bit unit, serial handshake).
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23 iB6
Out (SE L2) select output, P-type open drain
24 iB5 Out (SE L 1) select output, P-type open drain
25
iB4 In Slide switch input
26 iB3 Out Key strobe output, low during standby, but pulse issued with a key operation.
27
iB2 Out Key strobe output, low during standby, but pulse issued with a key operation.
28 iB1 Out Key strobe output, low during standby, but pulse issued with a key operation.
29 VM In LCD power supply
30 VA In LCD power supply
31 GND In Power supply
32 H1 Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
33 H2 Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
34 H3 Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
35 H4
Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
36 H5 Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
37 H6 Out
LCD Backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
38 H7
Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
39 HS Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
40 H9 Out LCD backplate signal, high impedance during standby, but 4 level pulse issued during displaying.
3~ CPU SIGNAL DESCRIPTION
..
PC-1260
PC-1261