Sony XVM-F65WL Service Manual page 37

IC601 MN5814 (DISPLAY CONTROL) (MONITOR BOARD (3/4))
Pin No. Pin Name
1 SYNCIN
2 HSYNCIN
CPHSEL (SIDE2),
3, 4
QHSEL (SIDE1)
5 VDBIN
6 HOUT
7 VOUT
8 BLACK
9 to 11 VPOS3 to VPOS1
12 LTBOX (ZOOM)
13 UP
14 POL
15 INTEXT
16 CPV
17 to 19 OEV3 to OEV1
20 STV1
21 OEH
22 QH (ZOOMC)
23, 24 STH1, STH2
25 CPH3
26 STV2
27 CPH2
28 RL
29 CPH1
30 HDOT2
31 JUST
32 POSSET
33 PD
34 QYDZMSEL
35 VDD
36 VCO1
37 VCO0
38 VSS
39 RST
40 HDOT1
41 WH (UONS)
42 to 45 HPOS4 to HPOS1
46 NP1
47 VDD
48 VSS
I/O
I Not used (Open)
I Horizontal sync signal input from the RGB decoder
I Screen size selection signal input from the system controller
I Vertical sync signal input from the RGB decoder
O Horizontal sync signal output terminal
O Not used (Open)
O Black signal output to the RGB decoder
I Vertical display position selection signal input terminal
I Screen size selection signal input from the system controller
Above and below scan direction selection signal input from the system controller
I
"L": all inversion, normally "H"
O Polarity inversion signal of reflection and opposite output to the RGB decoder
I Composite/separate sync selection signal input terminal
O Gate driver clock signal output to the liquid crystal display module
O Gate driver output enable pulse signal output to the liquid crystal display module
O Gate driver start pulse signal output to the liquid crystal display module
O Source driver output enable pulse signal output to the liquid crystal display module
O Not used (Open)
O Source driver start pulse signal output to the liquid crystal display module
O Source driver clock signal output to the liquid crystal display module
O Gate driver start pulse signal output to the liquid crystal display module
O Source driver clock signal output to the liquid crystal display module
Left and right scan direction selection signal input from the system controller
I
"L": all inversion, normally "H"
O Source driver clock signal output to the liquid crystal display module
I Mode selection signal input for number of display pixel
I Screen size selection signal input from the system controller
Horizontal display position and vertical display position offset selection signal
I
input terminal
O Phase comparation output terminal
I Screen size selection signal input terminal
— Power supply terminal (+3.3 V)
I VCO signal and system clock signal input terminal
O System clock signal output terminal
— Ground terminal
I System reset signal input terminal
I Mode selection signal input for number of display pixel
I Screen size selection signal input terminal
I Horizontal display position selection signal input terminal
I NTSC/PAL selection signal input terminal
— Power supply terminal (+3.3 V)
— Ground terminal
Pin Description
Not used
"L": NTSC, "H": PAL
XVM-F65WL
"H": zoom screen
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