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8
D
[6]
H_A#[3..35]
H_DBI#0
A8
[6]
H_DBI#0
H_DBI#1
G11
[6]
H_DBI#1
H_DBI#2
D19
[6]
H_DBI#2
H_DBI#3
C20
[6]
H_DBI#3
CPU_GTLREF1
F2
[4]
CPU_GTLREF1
H_IERR#
AB2
AB3
H_FERR#
R3
[11]
H_FERR#
H_STPCLK#
M3
[11]
H_STPCLK#
AD3
H_INIT#
P3
[11]
H_INIT#
H4
H_DBSY#
B2
[6]
H_DBSY#
H_DRDY#
C1
[6]
H_DRDY#
H_TRDY#
E3
[6]
H_TRDY#
H_ADS#
D2
[6]
H_ADS#
C
H_LOCK#
C3
[6]
H_LOCK#
H_BNR#
C2
[6]
H_BNR#
H_HIT#
D4
[6]
H_HIT#
H_HITM#
E4
[6]
H_HITM#
H_BPRI#
G8
[6]
H_BPRI#
H_DEFER#
G7
[6]
H_DEFER#
H_TDI
AD1
H_TDO
AF1
H_TMS
AC1
H_TRST#
AG1
H_TCK
AE1
AL1
[17]
THERMDA_CPU
AK1
[17]
VTIN_GND
H_TRMTRIP#
M2
[11]
H_TRMTRIP#
AE8
H_PROCHOT#
AL2
[4]
H_PROCHOT#
H_IGNNE#
N2
[11]
H_IGNNE#
ICH_H_SMI#
P2
[11]
ICH_H_SMI#
H_A20M#
K3
[11]
H_A20M#
VTT_OUT_LEFT
51R0402
51R0402
H_TESTHI13
L2
R16
R16
AH2
Kentsfield
N5
AE6
H_BPM#1
R17
R17
X_0R0402
X_0R0402
C9
CPU_GTLREF0
G10
[4]
CPU_GTLREF0
D16
A20
R19
R19
X_51R0402
X_51R0402
Y1
B
V2
AA2
H_FSBSEL0
G29
[16]
H_FSBSEL0
H_FSBSEL1
H30
[16]
H_FSBSEL1
H_FSBSEL2
G30
[16]
H_FSBSEL2
H_PWRGD
N1
[4,11]
H_PWRGD
H_CPURST#
G23
[4,6]
H_CPURST#
H_D#[0..63]
H_D#63
B22
[6]
H_D#[0..63]
H_D#62
A22
H_D#61
A19
H_D#60
B19
H_D#59
B21
H_D#58
C21
H_D#57
B18
H_D#56
A17
H_D#55
B16
H_D#54
C18
A
8
7
6
CPU SIGNAL BLOCK
H_A#[3..35]
U1A
U1A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
7
6
5
4
VCC_VRM_SENSE
EC1
EC1
X_C10U10X1206
X_C10U10X1206
VSS_VRM_SENSE
VID[0..7]
[23]
AN7
VID_SELECT
CPU_GTLREF0
H1
GTLREF0
CPU_GTLREF1
H2
GTLREF1
GTLREF_SEL
H29
GTLREF_SEL
CPU_MCH_GTLREF
E24
CS_GTLREF
H_BPM#5
AG3
BPM5#
H_BPM#4
AF2
BPM4#
H_BPM#3
AG2
BPM3#
AD2
H_BPM#2
BPM2#
H_BPM#1
AJ1
BPM1#
H_BPM#0
AJ2
BPM0#
R3
R3
0R0402
0R0402
G5
PCREQ#
H_REQ#[0..4]
H_REQ#4
J6
REQ4#
H_REQ#3
K6
REQ3#
H_REQ#2
M6
REQ2#
H_REQ#1
J5
REQ1#
H_REQ#0
K4
REQ0#
H_TESTHI12
W2
TESTHI12
H_TESTHI11
P1
TESTHI11
H_TESTHI10
H5
TESTHI10
H_TESTHI9
G4
TESTHI9
H_TESTHI8
R9
R9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
H_TESTHI2_7
R11
R11
F25
TESTHI2
H_TESTHI1
R12
R12
W3
TESTHI1
H_TESTHI0
R14
R14
F26
TESTHI0
FORCEPH
R13
R13
AK6
FORCEPH
G6
RSVD
G28
BCLK1#
F28
BCLK0#
H_RS#[0..2]
H_RS#2
A3
RS2#
H_RS#1
F5
RS1#
H_RS#0
B3
RS0#
TP2
TP2
U3
AP1#
TP3
TP3
U2
AP0#
F3
BR0#
H_COMP5
T2
R18
R18
COMP5
H_COMP4
R21
R21
J2
COMP4
H_COMP3
R20
R20
R1
COMP3
H_COMP2
R22
R22
G2
COMP2
T1
H_COMP1
R23
R23
COMP1
H_COMP0
R24
R24
A13
COMP0
TP4
TP4
J17
DP3#
TP5
TP5
H16
DP2#
TP7
TP7
H15
DP1#
TP6
TP6
J16
DP0#
H_ADSTB#1
AD5
H_ADSTB#1
ADSTB1#
H_ADSTB#0
R6
ADSTB0#
H_ADSTB#0
H_DSTBP#3
C17
DSTBP3#
H_DSTBP#3
H_DSTBP#2
G19
H_DSTBP#2
DSTBP2#
H_DSTBP#1
E12
H_DSTBP#1
DSTBP1#
H_DSTBP#0
B9
DSTBP0#
H_DSTBP#0
H_DSTBN#3
A16
DSTBN3#
H_DSTBN#3
G20
H_DSTBN#2
H_DSTBN#2
DSTBN2#
H_DSTBN#1
G12
H_DSTBN#1
DSTBN1#
H_DSTBN#0
C8
DSTBN0#
H_DSTBN#0
H_NMI
L1
LINT1/NMI
H_NMI
H_INTR
K1
H_INTR
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
5
4
3
2
VCC_VRM_SENSE [23]
VSS_VRM_SENSE [23]
VTT_OUT_RIGHT
RN1
RN1
8P4R-680R
8P4R-680R
VID2
VTT_OUT_RIGHT
1
2
VTT_OUT_RIGHT [4,5]
VID5
3
4
VID4
5
6
VID0
7
8
VID7
C1
C1
C2
C2
1
2
VID3
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
3
4
VID6
5
6
VID1
7
8
RN2
RN2
8P4R-680R
8P4R-680R
VRD_VIDSEL [23]
Prescott / Cedar Mill
CPU_GTLREF0 [4]
CPU_GTLREF1 [4]
TP1
TP1
LL_ID[1:0] = 00
CPU_MCH_GTLREF [6]
GTLREF_SEL = 0
VTT_SEL = 1
H_BPM#0
H_BPM#0
[5]
PECI
[11,17]
H_REQ#[0..4]
[6]
H_TESTHI9
H_TESTHI12
H_TESTHI8
H_TESTHI12
[5]
R6
R6
51R0402
51R0402
R8
R8
51R0402
51R0402
R7
R7
51R0402
51R0402
R10
R10
51R0402
51R0402
51R0402
51R0402
VTT_OUT_LEFT
BSEL
2
V_FSB_VTT
0
51R0402
51R0402
0
51R0402
51R0402
51R0402
51R0402
0
X_62R0402
X_62R0402
VTT_OUT_RIGHT [4,5]
CK_H_CPU#
[16]
CK_H_CPU
[16]
H_RS#[0..2]
[6]
H_BR#0
H_BR#0
[4,6]
X_51R0402
X_51R0402
X_51R0402
X_51R0402
VTT_OUT_LEFT [4]
51R0402
51R0402
51R0402
51R0402
VTT_OUT_RIGHT
51R0402
51R0402
C3
C3
51R0402
51R0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C4
C4
C0.1U16Y0402
C0.1U16Y0402
C5
C5
C0.1U16Y0402
C0.1U16Y0402
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[11]
[11]
VTT_OUT_RIGHT
R28
R28
X_10KR0402
X_10KR0402
Q1
Q1
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
H_PROCHOT#
E
FORCEPH
R30
R30
X_0R0402
X_0R0402
Title
Title
Title
Intel LGA775 - Signals
Intel LGA775 - Signals
Intel LGA775 - Signals
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date:
Date:
Date:
Monday, August 27, 2007
Monday, August 27, 2007
Monday, August 27, 2007
3
2
1
VRD_VIDSEL Pull high
R2
R2
680R
680R
VRD_VIDSEL [23]
D
Kentsfield
R5
R5
X_0R0402
X_0R0402
H_BPM#2
R4
R4
X_0R0402
X_0R0402
H_BPM#3
C
TABLE
1
0
FSB FREQUENCY
0
0
267 MHZ (1067)
1
0
200 MHZ (800)
0
1
133 MHZ (533)
RN3
RN3
8P4R-51R0402
8P4R-51R0402
H_BPM#3
1
2
H_BPM#5
3
4
H_BPM#1
5
6
H_BPM#0
7
8
RN4
RN4
8P4R-51R0402
8P4R-51R0402
H_TMS
1
2
H_TDI
3
4
B
H_BPM#2
5
6
7
8
H_BPM#4
RN51
RN51
8P4R-51R0402
8P4R-51R0402
H_TCK
1
2
H_TRST#
3
4
H_IERR#
5
6
H_TDO
7
8
PLACE BPM TERMINATION NEAR CPU
VCC3
R29
R29
10KR0402
10KR0402
C
ICH_THERM#
[11]
A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Rev
Rev
Rev
MS-7377 (BELEM) uBTX
MS-7377 (BELEM) uBTX
MS-7377 (BELEM) uBTX
10
10
10
Sheet
Sheet
Sheet
3
3
3
of
of
of
35
35
35
1
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