Camera/Fdd Interface Block Diagram - Sony MVC-FD81 Service Manual

MVC-FD81

3-2. CAMERA/FDD INTERFACE BLOCK DIAGRAM

IC101 !§ IC101 @§ CAMERA REC
IC431 8 CAMERA REC/PB
4.0Vp-p
1.8Vp-p 60nsec
78µsec
IC102 @∞
CAMERA REC/PB
IC431 1,3
60nsec
78µsec 9.5Vp-p
IC431 !∞,!§
IC431 2,4
4.5Vp-p
60nsec
IC431 !¢
9.5Vp-p
78µsec
4Vp-p
IC601 #¶
60nsec
3.8Vp-p
60nsec
IC601 !ª
0.16Vp-p
78µsec
IC601 @£
0.18Vp-p
78nsec
IC601 !¢
0.1Vp-p
78µsec
3-5
IC101 2 – !¡ IC103 #§,$∞
CAMERA REC/PB CAMERA REC/PB
3.1Vp-p
60nsec 60nsec
1.8Vp-p
78µsec
4.0Vp-p
IC102 4
CAMERA REC/PB
3.8Vp-p
30nsec
IC601 5
3.8Vp-p
60nsec
3-6
3.8Vp-p
IC801 *£
16.26MHz 5.0Vp-p
6.875MHz
IC851 *º
1.8Vp-p
7.41MHz
IC601 $™
CAMERA REC/PB
4.0MHz
3-7
3.2Vp-p
3-8