Bit Manipulation Instructions - Panasonic PanaXSeries MN1030 Series User Manual

12.3.4 Bit Manipulation Instructions

Bit operations
Mnemonic
BTST imm, Dn
BTST imm8, (d8,An)
BTST imm8, (abs32)
BSET Dm, (An)
BSET imm8, (d8,An)
BSET imm8, (abs32)
BCLR Dm,(An)
BCLR imm8,(d8,An)
AND the zero-extended imm8, zero-extended imm16, or imm32 with the contents
of Dn and set the flags according to the result.
AND the zero-extended imm8 with the zero-extended 8-bit contents of the memory
location specified by d8 and An and set the flags according to the result.
AND the zero-extended imm8 with the zero-extended 8-bit contents of the memory
location specified by abs32 and set the flags according to the result.
This instruction proceeds through the following three stages:
1.Transfer, with zero-extension, the 8-bit contents of the memory location specified
with An to a 32-bit internal temporary register.
2.AND the temporary register with the contents of Dm and set the flags according
to the result.
3.OR the temporary register with the contents of Dm and store the lowest 8 bits of
the result in the memory location specified with An.
This instruction proceeds through the following three stages:
1.Transfer, with zero-extension, the 8-bit contents of the memory location specified
with d8 and An to a 32-bit internal temporary register.
2.AND the temporary register with zero-extended imm8 and set the flags according
to the result
3.OR the temporary register with zero-extended imm8 and store the lowest 8 bits of
the result in the memory location specified with d8 and An.
This instruction proceeds through the following three stages:
1.Transfer, with zero-extension, the 8-bit contents of the memory location specified
with abs32 to a 32-bit internal temporary register
2.AND the temporary register with zero-extended imm8 and set the flags according
to the result.
3.OR the temporary register with zero-extended imm8 and store the lowest 8 bits of
the result in the memory location specified with abs32.
This instruction proceeds through the following three stages:
1.Transfer, with zero-extension, the 8-bit contents of the memory location specified
with An to a 32-bit internal temporary register.
2.AND the temporary register with the contents of Dm and set the flags according
to the result.
3.AND the temporary register with the ones complement of the contents of Dm and
store the lowest 8 bits of the result in the memory location specified with An.
This instruction proceeds through the following three stages:
1.Transfer, with zero-extension, the 8-bit contents of the memory location specified
with d8 and An to a 32-bit internal temporary register.
2.AND the temporary register with zero-extended imm8 and set the flags according
to the result.
3.AND the temporary register with the ones complement of zero-extended imm8
and store the lowest 8 bits of the result in the memory location specified with d8
and An.
Chapter 12 List of Machine Language Instructions
Description of operation
List of Machine Language Instructions 241