Pin Function - Marantz SR5200 K2G Service Manual

IC108 TDA7330

PIN FUNCTION

Nr. Name
1 MUXIN RDS input signal.
2 V Reference voltage
ref
3 COMP Not inverting comparator input (smoothing filter)
4 FIL OUT Filter Output
5 GND Ground
6 T1 Testing output pin (not to be used)
7 T3 Testing output pin (not to be used)
8 T4 Testing output pin (not to be used)
9 OSC OUT Oscillator output
10 OSC IN Oscillator Input
11 T57 Testing output pin: 57KHz clock output
12 RDCL RDS clock output (1187.5Hz)
13 RDDA RDS data output
14 QUAL Output for signal quality indication (High = good)
15 ARI Output for ARI indication (High when RDS + ARI signals are present)
16 V Supply Voltage
CC
17 T2 Testing output pin (not to be used)
18 FSEL Frequency selector pin: open = 4.332MHz, closed to V
19 TM Test mode pin (open = normal RUN)
(closed to V
20 POR Reset Input for testing (active high)
Description
(High when only ARI is present)
(Low when only RDS is present)
(indefined when no signal is present)
= 8.664MHz
CC
= Test mode)
CC
41
IC107
CXP740095
12
AN0 to AN11 A/D CONVERTER
RxD UART RECEIVER
UART TRANSMITTER
TxD
UART BAUD RATE
GENERATOR
PWM0 12-BIT PWM GENERATOR 0
PWM1 12-BIT PWM GENERATOR 1
REMOCON IN FIFO
RMC
CS0
SERIAL
SI0 BUFFER
INTERFACE
SO0
RAM
UNIT (CH0)
SCK0
CS1
SERIAL
SI1 BUFFER
INTERFACE
SO1 RAM
UNIT (CH1)
SCK1
SI2
SERIAL INTERFACE UNIT
SO2
(CH2)
SCK2
EC0 8-BIT TIMER/COUNTER 0
2
8-BIT TIMER 1
TO0
8-BIT TIMER/COUNTER 2
EC1
2
TO1 8-BIT TIMER 3
TO2
16-BIT CAPTURE
2
CINT
TIMER/COUNTER 4
EC2
ADJ
PIN NO PIN NAME DESCRIPTION IN/OUT ASSIGN
1 DSP INT Request DSP Interupt Request I/O I
2 Clock Select I/O O
3 DSP CS DSP Chip Select I/O O
4 RAM CE RAM Chip Enable I/O O
5 DSP Autoboot I/O O
6 ERR Mute Error Mute I/O O
7 EPROM Addr. 15 EPROM Address (Pin 3) I/O O
8 EPROM Addr. 16 EPROM Address (Pin 2) I/O O
9 EPROM Addr. 17 EPROM Address (Pin 30) I/O O
10 74151 Select 0 MM74HC151 Select 0 (A0) I/O O
11 74151 Select 2 MM74HC151 Select 0 (A2) I/O O
12 74151 Select 1 MM74HC151 Select 0 (A1) I/O O
13 SDA DIR/DSP/4228/4391 Serial Data I/O I/O
14 DSP DIN DSP DATA INPUT ( DSP MCU) I/O I
15 SCL DIR/DSP/4228/4391 Serial Clock I/O O
16 DIR CE DIR Chip Enable I/O O
17 DIR DIN DIR Data Input ( DIR MCU) I/O I
18 DSP Reset CS49326 Reset I/O O
19
DAC Reset 4228/4391 Reset I/O O
20 6dB ATT 6dB Attenuation I/O O
21
Multiroom Mute I/O O
22 F_SPK_RLY Front Speaker Relay I/O O
23 H/P RLY HeadPhone Relay
I/O O
24 Mul_OSD CE Multiroom OSD Chip Enable(SR6200: C-VIDEO Mute) I/O O
25 Front Mute
I/O O
26 Center Mute I/O O
27 R Center Mute Rear Center Mute
I/O O
28 Subwoofer Mute I/O O
29 Rear Mute
I/O O
30 Power Relay I/O O
31 Main OSD CE Main OSD Chip Enable
O O
32 DAC CS DAC(CS4391) Chip Select O O
33
O O
34 ATT LED Attenuation LED O O
35 Display Off LED
O O
36 EPROM Addr. 17 EPROM Address (Pin 31)- PS7200/PS5200 ONLY O O
37 Night Mode LED
O O
38 Multi-Room LED O O
39 FL Reset I/O O
40 MCU Reset I
41 GND Vss
42 XTAL 12MHz
43 EXTAL I I
44 FL Drv. CE FL Driver(LC75721E) Chip Enable I/O O
45 FL Drv. Data FL Driver(LC75721E) Data I/O O
46 FL Drv. CLK FL Driver(LC75721E) Clock I/O O
47 Standby LED I/O O
48 Vol.Encoder Down Volume Encoder Down I/O I
49 Vol.Encoder Up Volume Encoder Up I/O I
50 Multi Encoder Up Multi-Room Volume Encoder Up I/O I
51 Multi Encoder Down Multi-Room Volume Encoder Down I/O I
CLOCK
SPC 700 αII
GENERATOR/
CPU CORE
SYSTEM CONTROL
PROM RAM
120K 4096
BYTES BYTES
PRESCALER/ 32kHz
TIME-BASE TIMER TIMER/COUNTER
PORT K
ACTIVE PULL-UP
PIN NO PIN NAME DESCRIPTION
LEVEL DOWN
52 GND Avss
53 V AV
DD REF
54 V AV
DD DD
55 Protection
56 DIR Reset
57 Step Option
58 Set Option
59 Key3
Low 60 Key2
61 Key1
62 Auto/Audio from DIR
63 Auto TV(C)
64 Auto TV(S)
65 4094 CE 4094 Chip Enable
66 Multi-Room V-SYNC
67 S. Video Detector
68 V-SYNC
69 Multi RC5 In
70 Kill RC5
71 N.C
72 N.C
73 4094(RLY,DC) CE 4094 (RLY,DC0) Chip Enable
74 TC9274/9164 CLK TC9274 / 9164 Clock
75 TC9274/9164 Data
76 TC9274/9164 CE TC9274 / 9164 Chip Enable
77 Power Down Check
78 RDS Clock
79 RDS Data
80 Headphone Check
81 Rear Mode
PU 82 Rear Off
PU 83 Multi-Room RC5 Out
PU 84 RC5 Out
Low PU 85 Remote Control RC5 In
PU 86
Low
PU 87
PU 88 GND V
Low SS
Low PU 89 V V
DD DD
90 N.C
Low 91 PLL/Vol. CLK PLL / Volume Clock
92 PLL/Vol. Data PLL / Volume Data
93 TC9459/9842 CE TC9459 / 9842 Chip Enable
94 PLL Data In PLL Data In ( PLL MCU)
Low 95 Tuner Mute
96 Stereo
97 Tuned
L/H 98 PLL CE PLL Chip Enable
99 4094/OSD CLK 4094 / OSD Clock
100 4094/OSD Data
42
8 PA0 to PA7
8 PB0 to PB7
PC0 to PC7
8
PD0 to PD7
8
PE0 to PE1
2
6 PE2 to PE7
PF0 to PF7
8
PG0 to PG7
8
PH0 to PH7
8
7 PI1 to PI7
8
PJ0 to PJ7
IN/OUT ASSIGN ACTIVE PULL-UP
LEVEL DOWN
I
I/O I
I/O O
I/O I
I/O I
I I
I I
I I
I I
I/O I
I/O I
I/O O
I/O I Low
I/O I Low
I/O I Low
I/O I
I/O O
O O
O O
O O
O O
O O
O O
I I
I I
I/O O
I/O I
I/O O Low
I/O O Low
I/O O
I/O O Low
I/O I
I I
I I
I/O O
I/O O
I/O O
I/O I
I/O O
I/O I
I/O I
I/O O
I/O O
I/O O