D-Board (2 Of 2) Block Diagram - Panasonic TH-65PX600U Service Manual

Digital high definition plasma television
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15.45. D-Board (2 of 2) Block Diagram

D DIGITAL SIGNAL PROCESSOR
FORMAT CONVERTER
PLASMA AI
SUB-FIELD PROCESSOR
1
2
3
4
BUS SW
5
FLASH CONTROL
6
JTAG
7
DISCHARGE CONTROL
8
9
10
11
12
13
14
Control DATA(U)
15
Control DATA(D)
16
SS PULSE
17
SC PULSE
18
IC9504
LEVEL CONVERTER
3.3V
IC9505
LEVEL CONVERTER
3.3V
IC9503
LEVEL CONVERTER
SOS9_C0NF
19
3.3V
DRV_RST
20
3.3V
5V
IC9802,03
LEVEL CONVERTER
SOS6,7,8
21
TH-65PX600U
D-Board (2 of 2) Block Diagram
IC9400
PD1-M<RIGHT>
FORMAT CONVERTER/RGB PROCESSOR<R>
R 10bit
CTI/TINT
I/P
G 10bit
FORMAT
COLOR
CONTRAST
CONVERTER
CONVERTER
B 10bit
WB-ADJ
st-r
SFRST
SFVRST
VD
VD
LATCH
HD
HD
DCK
JTAG
DCK
PCK
OCK
SCL
P3V_SCL02
TD0,TD1,TMS,TCK
P3V_SDA02
60MHz
14
CLK5
XT
39.5MHz
7
CLK1
20MHz
CLKM_IN
13
CLK6
84MHz
FREE_RUN
XTN
12
CLK7
R10-R19,G10-G19,B10-B19
PCK
OCK
JTAG
SFRST
IC9300
SFVRST
LATCH
FORMAT CONVERTER/RGB PROCESSOR<L>
FPCLK
FPDAT0
FPDAT1
R 10bit
CTI/TINT
G 10bit
I/P
FORMAT
COLOR
CONVERTER
CONVERTER
CONTRAST
B 10bit
WB-ADJ
st-r
VD
VD
HD
HD
IIC
DCK
DCK
SCL
SDA
P3V_SCL02
P3V_SDA02
P5V
5V
ODEU1,ODEU2,PCU1,PCU2,LEU1,LEU2,CLRU1,CLRU2
P5V
5V
ODED5,ODED6,PCD5,PCD6,LED5,LED6,CLRD5,CLRD6
P5V
5V
Sustain Control DATA 8bit
UMH,UML,USH,USL,UEH,NUEL,URH,URL
Data power recovery DATA 8bit
DMHR,DSHR,DSLR,DMLR,DMHL,DSHL,DMLL,DSLL
P5V
D20
2
Scan Control DATA 13bit
9
13
CL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,DVR_RST_0,CSL,CSH,CML,CMH
P5V
20
LED
1
SOS6_SC1
11
SOS7_SC2
12
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<R>
R 10bit
DATA
NEW
SUB-FIELD
G 10bit
PLASMA AI
PROCESSOR
DRIVER
B 10bit
IIC
XRST
SDA
XRST2
IC9304
IC9602
16M FLASH MEMORY
RESET
P3.3V
DQ0-DQ3
5
4
VCC
VOUT
RESET
X9500
DQ4-DQ15
1
XCE-L
IC9200
XOE
XWE
A0-A19
20
CLOCK GENE.
BYTE
IC9402
BUS SW
DA14,DA15-DC15<L>
BUS
UA05-UC12,UC13,UA15<L>
SWITCH
XRST
XRST
XCE-L
PD1-M<LEFT>
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<L>
R 10bit
NEW
SUB-FIELD
DATA
G 10bit
PLASMA AI
PROCESSOR
DRIVER
B 10bit
Q9306
TO SC20
SCAN
DATA
P5V
SOS6-SC1
SOS7-SC2
D36
52
38
28
6
36
34 61
60 59
58
56 55 54 32 30 4
3
2
64
66
R-DOWN
TO C60
NOT
USED
125
IC9401
DDR SDRAM<R>(128M)
DRVCLKU0-U3,DRVCLKD0-D3<R>
CLKU3
Video DATA
48bit UA00-UC11<U/R>
CLKU2
Video DATA 48bit DA00-DC11<D/R>
ROMDATA04-15 UA12-UC15<R>
ODEU1
ROMDATA00-03 DA14,DA15-DC15<R>
LEU1
PCU1
CLRU1
IC9603
BUS SWITCH
XCE-L
DA14,DA15-DC15<L>
UA12-UC15<L>
UA05-UC10,UB11,UC11<L>
CLKU0
CLKU1
CLKU3
CLKU2
ODEU2
LEU2
PCU2
CLRU2
UA12-UC12,UC13,UA15
UA05-UC11
IC9301
DDR SDRAM<L>(128M)
ROMDATA00-03 DA14,DA15-DC15<L>
ROMDATA04-15 UA12-UC15<L>
Video DATA 48bit UA00-UC15<U/L>
Video DATA 48bit DA00-DC15<D/L>
CLKU1
CLKU0
DRVCLKU0-U3,DRVCLKD0-D3<L>
CLKD0
CLKD1
68
D35
56
38
28
2
36
34
32
30
61
60
59
58 64
68
66
L/R-DOWN
TO C54
TH-65PX600U
D-Board (2 of 2) Block Diagram
TH-65PX600U
R-UP
D31
TO C10
52
30bit UA06-UC15<R>
DOUTU31C
38
28
DOUTU22A
6
32
CLKU7(-)
30
CLKU6(+)
56
DMHR
55
DSHR
NOT
USED
54
DMLR
36
DSLR
61
ODEU1(R)
60
LEU1(R)
59
PCU1(R)
CLRU1(R)
58
Q9300
64
5VDET
P5V
68
P5V
TP9534
66
L/R-UP
TO C24
D32
18bit UA00-UC05<R>
56
DOUTU21C
38
DOUTU16A
18bit UA10-UC15<L>
28
DOUTU15C
2
DOUTU10A
36
CLKU5(-)
34
CLKU4(+)
32
CLKU3(-)
30
CLKU2(+)
61
ODEU2(L)
60
LEU2(L)
59
PCU2(L)
CLRU2(L)
58
Q9301
64
5VDET
P5V
68
P5V
TP9533
66
L-UP
D33
TO C25
52
DOUTU9C
30bit UA00-UC09<L>
38
28
DOUTU0A
6
36
CLKU1(-)
34
CLKU0(+)
30
DSLL
4
DMHL
NOT
USED
3
DSHL
2
DMLL
Q9302
64
5VDET
P5V
68
TP9462
P5V
66
L-DOWN
D34
TO C55
48
DOUTD0A
30bit DA00-DC09<L>
38
28
DOUTD9C
2
60
SUSTAIN
DATA
51
62
SOS8-SS
32
CLKD0(+)
30
CLKD1(-)
Q9303
64
5VDET
P5V
68
P5V
TP9051
66

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