Sony DSR-400 Service Manual page 175

R2008
0
012 FPGA_NCONFIG
C2210
0.01uF
GND
3.3V 3.3V
IC2005
EPC2LC20-TP
R2002 R2003
10k 10k
18 20
2 VPP VCC 4 DCLK
DATA DCLK
12 8
STATUS
nCASC OE
13 9
DONE
nINIT_CONF nCS
5
VCCSEL
14
VPPSEL
R2010
C2006
0
0.1uF 11
TDI
16V C
TDI
1
TDO
19
TMS
TMS
3
TCK
TCK
GND
10
TCK
TDO
TMS
GND
DATA
3.3V
IC2004
EPC2LC20-TP
18 20
2 VPP VCC 4
DATA DCLK
12 8
nCASC OE
13 9
nINIT_CONF nCS
5
VCCSEL
14
VPPSEL
C2036 R2011
11
0.1uF 0
TDI
16V C
1
TDO
19
TMS
TMS
3
TCK
TCK
GND
10
GND
IC2006
3.3V
EPCS4SI8N
NM
C2211
0.1uF
16V C NM
R2210
0
5 2
DATA
ASDI DATA
NM
6
DCLK
1
CS
GND
R2211
0
DCLK
NM
3.3V
GND
TDI
TMS
TCK
22
R2012
009 CPC_TCK
009 FPGA_CPC
DSR-400/V2(J, E)
A B
DVP-32 (4/12)
3.3V-A
76 2
nCONFIG[J2] VCCINT1[B1]
17
R2204
VCCINT2[U1]
22 11 19
DCLK
DCLK[L1] VCCINT3[V2]
300 34
STATUS
nSTATUS[L12] VCCINT4[V17]
DONE 106 36
CONF_DONE[K17] VCCINT5[U18]
290 51
DATA
DATA0[H7] VCCINT6[B18]
R2205 53
R2208 VCCINT7[A17]
22
0 NM 9 68
IO4/nCSO[J1] VCCINT8[A2]
129 313
IO88/LVDS23p/INIT_DONE[C3] VCCINT9[L9]
130 319
R2209
IO89/LVDS22p/CLKUSR[D3] VCCINT10[H10]
0 NM
265 321
IO212/ASDO[K6] VCCINT11[J9]
323
3.3V-A
VCCINT12[K10]
77
nCEO[K2]
291 5
nCE[J7] VCCIO1_1[E1]
R2206
0 14
VCCIO1_2[P1]
43 289
TCK[K18] VCCIO1_3[G7]
107 294
TDI[J17] VCCIO1_4[M7]
R2013 0
278
TDO[K13]
247 56
TMS[K14] VCCIO2_1[A14]
136 65
MSEL0[K3] VCCIO2_2[A5]
292 254
R2207 MSEL1[K7] VCCIO2_3[E12]
0 257
NM VCCIO2_4[E9]
GND GND
39
Configuration Mode = PS VCCIO3_1[P18]
48
VCCIO3_2[E18]
299
D_1.5V
VCCIO3_3[M12]
303
VCCIO3_4[H12]
L2001 C2012 IC2001 (3/3)
22
0.1uF
10uH EP1C12F324C8N(300)
16V VCCIO4_1[V5]
C 229 31
VCCA_PLL1[J5] VCCIO4_2[V14]
C2011
10 237
0.1uF
C2010 GNDA_PLL1[K1] VCCIO4_3[P8]
16V C
22uF 264 240
GNDG_PLL1[J6] VCCIO4_4[P11]
302
GND GND
VCCA_PLL2[J12]
301 1
GNDA_PLL2[K12] GND1[A1]
C2013 44 3
0.1uF GNDG_PLL2[J18] GND2[C1]
16V
16
C
GND3[T1]
GND 18
GND4[V1]
20
GND5[V3]
33
GND6[V16]
35
GND7[V18]
37
GND8[T18]
50
GND9[C18]
52
GND10[A18]
54
GND11[A16]
67
GND12[A3]
69
GND13[B2]
84
GND14[U2]
99
GND15[U17]
114
GND16[B17]
309
GND17[H8]
310
GND18[J8]
311
GND19[K8]
312
GND20[L8]
314
GND21[L10]
315
GND22[L11]
316
GND23[K11]
317
GND24[J11]
318
GND25[H11]
320
GND26[H9]
322
GND27[K9]
324
GND28[J10]
AVANT (FPGA)
DVP-32 (4/12)
Ref. No. 2000
BOARD NO. 1-866-390-11
VCX-427_DVP-32_009_4
C D
DVP-32 (4/12)
3.3V
3.3V-A FB2002
C2209
C2020
47uF
0.1uF
16V C C2026 10V
22uF
GND
D_1.5V
FB2003
C2014 C2203
0.1uF 47uF
16V C
10V
C2019
GND
22uF
C2015 0.1uF
16V C
C2016 0.1uF
16V C
C2017 0.1uF
16V C
C2018 0.1uF
16V C
C2031
0.1uF
16V C
C2032 0.1uF
16V C
C2205 0.1uF
16V C
C2206 0.1uF
16V C
GND
0.1uF
C2021 16V C
0.1uF
16V C
C2022
0.1uF
C2023 16V C
0.1uF
C2024 16V C
0.1uF
C2025
16V C
0.1uF
C
C2033 16V
0.1uF
C2034 16V C
0.1uF
C
C2035 16V
0.1uF
C2204 16V C
0.1uF
C
C2207 16V
0.1uF
C2208 C
16V
GND
GND
4-41 4-41
E F G
1
2
3
4
5
H