Sony DSR-400 Service Manual page 174

1
3.3V
R2110
R2109
S2001
220k
220k
NM
NM
1 2
3 4
SRC_DATA_I
NM
GND
001 AU_AD_I_BUF
012 AU_DA_O
SRC_BCK_P2
SRC_LRCK_P2
SRC_BYPASS
AU_SRC_AVANT
2
001,003,012
SYS_SCK
SYS_SO
SYS_SI
XCS_FPGA
009,010,012
SYS_SCI
012 CN_PX_AVANT
CAM_VIDEO_I[4]
CAM_VIDEO_I[5]
CAM_VIDEO_I[6]
CAM_VIDEO_I[7]
R2006
22
012 CAM_27M
R2004
47 CAM_VIDEO_I[0]
NM
CAM_VIDEO_I[1]
C2027
CAM_VIDEO_I[2]
6pF
NM CAM_VIDEO_I[3]
3
GND
CAM_CF_I
CAM_HD_I
CAM_VD_I
CAM_OE_I
C2105
C2104
47pF
47pF
NM
NM
012 IV_27M
RET_VIDEO_O[4]
R2005
47 RET_VIDEO_O[5]
NM
RET_VIDEO_O[6]
C2028
RET_VIDEO_O[7]
6pF
NM
GND
RET_VIDEO_O[0]
RET_VIDEO_O[1]
RET_VIDEO_O[2]
RET_VIDEO_O[3]
012 COMP_HD
012 COMP_OE
C2102 C2103
47pF
4 47pF
NM NM
GND
For Debug
009 FPGA_RXD
009 FPGA_TXD
5
A B
83 128
IO47/LVDS0p[T2] IO87/LVDS24n/DEV_OE[B3]
142 66
IO99/LVDS0n[T3] IO35/LVDS26n/DQ1T6[A4]
15 127
IO7/VREF2B1[R1] IO86/LVDS26p/DQ1T7[B4]
82 180
IO46/LVDS1p[R2] IO136/LVDS24p/DEV_CLRn[C4]
141 126
IO98/LVDS1n[R3] IO85/DPCLK2/DQS1T[B5]
81 179
IO45/LVDS2p/DQ1L6[P2] IO135/LVDS27n/DQ1T4[C5]
140 224
IO97/LVDS2n/DQ1L7[P3] IO178/LVDS27p/DQ1T5[D5]
191 64
IO146[P4] IO34/VREF2B2[A6]
13 125
IO6/LVDS6p[N1] IO84/LVDS28n[B6]
80 178
IO44/LVDS6n[N2] IO134/LVDS28p[C6]
139 223
IO96/LVDS3p/DQ1L4[N3] IO177/LVDS29p[D6]
190 260
IO145/LVDS3n/DQ1L5[N4] IO208/LVDS29n[E6]
233 63
IO186/LVDS4p[N5] IO33/LVDS31n/DQ1T2[A7]
268 124
IO215/LVDS4n[N6] IO83/LVDS31p/DQ1T3[B7]
269 177
IO216/LVDS5n[N7] IO133/LVDS30p[C7]
12 222
IO5/DQ1L0[M1] IO176/LVDS30n[D7]
79 259
IO43/LVDS8n/DQ1L2[M2] IO207/LVDS32p/DQ1T1[E7]
138 62
IO95/LVDS8p/DQ1L1[M3] IO32/LVDS33n[A8]
189 123
IO144/LVDS7n[M4] IO82/LVDS33p[B8]
232 176
IO185/LVDS7p/DQ1L3[M5] IO132/LVDS34p[C8]
267 221
IO214/LVDS5p[M6] IO175/LVDS34n[D8]
78 258
IO42/LVDS10p[L2] IO206/LVDS32n/DQ1T0[E8]
137 287
IO94/LVDS10n[L3] IO233/LVDS25n[F8]
188 308
IO143/LVDS9n[L4] IO244/LVDS25p[G8]
231 61
IO184/LVDS9p[L5] IO31/LVDS35n[A9]
266 122
IO213/LVDS11n[L6] IO81/LVDS35p[B9]
293 175
IO235/LVDS11p/DM1L[L7] IO131/LVDS36p[C9]
187 220
IC2001 (1/3)
IO142/PLL1_OUTp[K4] IO174/LVDS36n/DM1T[D9]
EP1C12F324C8N(300)
230 286
IO183/PLL1_OUTn[K5] IO232/LVDS37p[F9]
135 307
CLK0/LVDSCLK1p[J3] IO243/LVDS37n[G9]
186 60
CLK1/LVDSCLK1n[J4] IO30/LVDS38p[A10]
8 121
AVANT
IO3/DQ0L7[H1] IO80/LVDS38n[B10]
75 174
IO41/LVDS13p[H2] IO130/LVDS39n[C10]
134 219
IO93/LVDS13n[H3] IO173/LVDS39p[D10]
185 256
IO141/LVDS12p[H4] IO205/VREF1B2[E10]
228 285
IO182/LVDS12n/DM0L[H5] IO231/LVDS46p[F10]
263 306
IO211/VREF1B1[H6] IO242/LVDS46n[G10]
7 59
IO2/LVDS17p[G1] IO29/LVDS40p/DM0T[A11]
74 120
IO40/LVDS17n[G2] IO79/LVDS40n[B11]
133 173
IO92/LVDS15p[G3] IO129/LVDS41n[C11]
184 218
IO140/LVDS15n/DQ0L4[G4] IO172/LVDS41p[D11]
227 255
IO181/LVDS14p/DQ0L5[G5] IO204[E11]
262 284
IO210/LVDS14n/DQ0L6[G6] IO230/LVDS49p[F11]
6 305
IO1/DPCLK1/DQS0L[F1] IO241/LVDS49n[G11]
73 58
IO39/LVDS19p[F2] IO28/LVDS42p[A12]
132 119
IO91/LVDS19n[F3] IO78/LVDS42n[B12]
183 172
IO139/LVDS18p[F4] IO128/LVDS43p/DQ0T7[C12]
226 217
IO180/LVDS18n[F5] IO171/LVDS43n/DQ0T6[D12]
261 57
IO209/LVDS16p[F6] IO27/LVDS45p[A13]
GND
288 118
IO234/LVDS16n[F7] IO77/LVDS45n[B13]
72 171
IO38/LVDS21n/DQ0L1[E2] IO127/LVDS44p/DQ0T5[C13]
131 216
IO90/LVDS21p/DQ0L0[E3] IO170/LVDS44n/DQ0T4[D13]
182 253
IO138/LVDS20p/DQ0L2[E4] IO203[E13]
225 117
IO179/LVDS20n/DQ0L3[E5] IO76/DPCLK3/DQS0T[B14]
4 170
IO0[D1] IO126/VREF0B2[C14]
71 215
IO37/LVDS22n[D2] IO169/LVDS47p/DQ0T3[D14]
181 55
IO137/VREF0B1[D4] IO26/LVDS48p/DQ0T1[A15]
70 116
IO36/LVDS23n[C2] IO75/LVDS48n/DQ0T0[B15]
169
IO125/LVDS47n/DQ0T2[C15]
115
IO74/LVDS50p[B16]
168
IO124/LVDS50n[C16]
C
DVP-32 (3/12) DVP-32 (3/12)
VIDEO_CAIN_AVANT 001
AU_CAIN_AVANT 001
113
DQ0
IO73/LVDS51n[C17]
SFD_BCK DQ15 49
IO25/DQ0R0[D18]
112
DATA_TO_SFD DQ1
IO72/LVDS51p[D17]
167
DATA_FROM_SFD DQ14
IO123/LVDS52n[D16]
214
DQ2
IO168/LVDS52p[D15]
CL2020 0.8 111
SFD_FCK
IO71/DPCLK4/DQS0R[E17]
166
SFD_LRCK DQ13
IO122/LVDS53n/DQ0R2[E16]
213
CL2017 DQ3
IO167/LVDS53p/DQ0R1[E15]
0.8
252
VD_I DQ12
IO202/VREF0B3[E14]
47
VD_O DQ4
IO24/LVDS56n[F18]
110
OE_I DQ11
IO70/LVDS56p[F17]
165
OE_O DQ5
IO121/LVDS54n[F16]
212
DQ10
IO166/LVDS54p/DQ0R3[F15]
251
CO_6 DQ6
IO201/LVDS55p[F14]
282
CI_7
IO228/LVDS55n[F13]
283
CO_7
IO229/LVDS57p[F12]
CL2019
46
HD_I 0.8 DQ9
IO23/LVDS60n/DQ0R6[G18]
109
HD_O DQ7
IO69/LVDS60p/DQ0R5[G17]
CO_4 DQ8 164
IO120/LVDS58p[G16]
211
CI_5 WE
IO165/LVDS58n[G15]
250
CO_5 CAS
IO200/LVDS59p[G14]
281
CI_6
IO227/LVDS59n/DQ0R4[G13]
304
IO240/LVDS57n[G12]
45
RAS
IO22/DQ0R7[H18]
108
CS
IO68/LVDS61p[H17]
163
CO_2 CKE
IO119/LVDS61n[H16]
210
CI_3 A9
IO164/LVDS62p[H15]
249
CO_3 BA0
IO199/LVDS62n[H14]
280
CI_4
IO226/LVDS63p/DM0R[H13]
162
CLK3/LVDSCLK2n[J16]
209
CL2021
CLK2/LVDSCLK2p[J15]
0.8
248
CI_0 A7
IO198/VREF1B3[J14]
279
CO_0
IO225/LVDS63n[J13]
161
CI_1 A11
IO118/PLL2_OUTn[K16]
208
CO_1 A8
IO163/PLL2_OUTp[K15]
CI_2 A10 42
IO21/LVDS66n[L18]
105
A6
IO67/LVDS66p[L17]
160
A0
IO117/LVDS64n/DM1R[L16]
R2111 22
207
A5
IO162/LVDS64p[L15]
246
A1
IO197[L14]
277
IO224/LVDS65p[L13]
41
A4
IO20/LVDS68n[M18]
104
A2
IO66/LVDS68p/DQ1R3[M17]
159
A3
IO116/DQ1R0[M16]
206
DQ16
IO161/LVDS67p/DQ1R1[M15]
245
YO_1 BA1
IO196/LVDS67n/DQ1R2[M14]
276
YI_1
IO223/LVDS65n[M13]
40
YO_0 DQ31
IO19/LVDS71n[N18]
CL2018
103
YI_0 0.8 DQ17
IO65/LVDS71p[N17]
158
YI_4 DQ30
IO115/LVDS69n[N16]
205
YO_3 DQ18
IO160/LVDS69p[N15]
244
YI_3
IO195/LVDS72p/DQ1R4[N14]
YO_2 275
IO222/LVDS70n[N13]
274
YI_2
IO221/LVDS70p[N12]
102
CAIN_PLL24M DQ29
IO64/DQ1R6[P17]
157
YI_5 DQ19
IO114/VREF2B3[P16]
204
YO_4
IO159/DPCLK5/DQS1R[P15]
243
YO_6 DQ28
IO194/LVDS72n/DQ1R5[P14]
38
YI_6 DQ20
IO18/LVDS74p[R18]
101
YO_5 DQ27
IO63/LVDS74n[R17]
156
YO_7 DQ21
IO113/LVDS73p[R16]
203
YI_7 DQ26
IO158/LVDS73n/DQ1R7[R15]
100
DQ22
IO62/LVDS75p[T17]
155
DQ25
IO112/LVDS75n[T16]
CAIN_13M 001
4-40 4-40
D E
98
DQ23
IO61/LVDS76p[U16]
32 DQ24
IO17/LVDS78p/DQ0B1[V15]
97
IO60/LVDS78n/DQ0B0[U15]
154
CL2022
IO111/LVDS76n[T15]
0.8
96
IO59/DPCLK6/DQS0B[U14]
153
IO110/LVDS79p/DQ0B3[T14]
202
IO157/LVDS79n/DQ0B2[R14]
30
IO16/LVDS82p/DQ0B5[V13]
95
IO58/LVDS82n/DQ0B4[U13]
152
HI_SI
IO109/LVDS81p[T13]
201
XCS_SP_PS
IO156/LVDS81n[R13]
242
IO193/VREF0B4[P13]
29
IO15/LVDS84p[V12]
94
IO57/LVDS84n[U12]
151
IO108/LVDS83p/DQ0B7[T12]
200
IO155/LVDS83n/DQ0B6[R12]
241
IO192[P12]
28
IO14/LVDS85n[V11]
93
IO56/LVDS85p/DM0B[U11]
150
IO107/LVDS86n[T11]
199
IO154/LVDS86p[R11]
273
IO220/LVDS77p[N11]
298
3.3V
IO239/LVDS77n[M11]
27
IO13/LVDS88n[V10]
92
FB2001
IO55/LVDS88p[U10]
C2002
149
0.1uF
IO106/LVDS87p[T10]
198 16V C
IO153/LVDS87n[R10]
239
IO191[P10]
IC2001 (2/3)
272
EP1C12F324C8N(300) C2001
IO219/LVDS80p[N10]
297 22uF
IO238/LVDS80n[M10]
26
IO12/LVDS91n[V9]
AVANT
91
GND
IO54/LVDS91p[U9]
148
IO105/LVDS90n[T9]
197
IO152/LVDS90p/DM1B[R9]
238
IO190/VREF1B4[P9]
271
IO218/LVDS89n[N9]
296
IO237/LVDS89p[M9]
25
IO11/LVDS93n[V8]
90
IO53/LVDS93p[U8]
147 CL2011 0.8
IO104/LVDS92p[T8]
196 CL2012 0.8
IO151/LVDS92n[R8]
270
IO217/LVDS101n[N8]
295
IO236/LVDS101p[M8]
24 CL2023 0.8
IO10/LVDS95n/DQ1B2[V7]
89 CL2024 0.8
IO52/LVDS95p/DQ1B3[U7]
146 CL2025 0.8
IO103/LVDS94p/DQ1B1[T7]
195
SPARE2_TC_FPGA
IO150/LVDS94n/DQ1B0[R7]
236
IO189/LVDS97n[P7]
23
IO9/LVDS98p[V6] GEN_LOCK_DET 012
88
IO51/LVDS98n/DQ1B5[U6] H_NTSC/L_PAL 009,012
145
IO102/LVDS96p[T6]
194
IO149/LVDS96n[R6]
235
IO188/LVDS97p/DQ1B4[P6]
87
XCS_MECHA_AVA
IO50/LVDS99n/DQ1B6[U5]
144
IO101/LVDS99p/DQ1B7[T5]
193
IO148/VREF2B4[R5]
234
IO187/DPCLK0/DQS1L[P5]
21 R2100 22
SPARE1_TC_FPGA
IO8/LVDS102n[V4]
86 R2101 22
SRC_BCK_P1
IO49/LVDS100n[U4]
143
SRC_LRCK_P1
IO100/LVDS100p[T4]
192 R2113
IO147/DPCLK7/DQS1B[R4] 22
85
IO48/LVDS102p[U3]
10000pF
GND
F
SIR_CLK 010,012
SIR_OUT 012
hi_cir 008,009,012
SYNC_LOCK 008,009
AVANT_OE 008,009,010
AVANT_VD 008,009
1K_TONE 012
SPARE1_SYS_FPGA 009
SPARE2_SYS_FPGA 009
C2003
C2005 C2008
0.1uF
0.1uF 0.1uF
16V C 16V C
16V C
C2004 C2007
0.1uF 0.1uF
16V C 16V C
GND GND GND GND GND GND
23 56
BA1 DQ31
BA1 DQ31
22 54
BA0 DQ30
BA0 DQ30
24 53
A10 DQ29
A10/AP DQ29
A9 66 51 DQ28
A9 DQ28
65 50
A8 DQ27
A8 DQ27
64 48
A7 DQ26
A7 DQ26
63 47
A6 DQ25
A6 DQ25
62 45
A5 DQ24
A5 IC2002 DQ24
61 42
A4 DQ23
A4 DQ23
IS42S32200B-6TL-TR
60 40
A3 DQ22
A3 DQ22
27 39
A2 DQ21
A2 DQ21
26 37
A1 DQ20
A1 DQ20
25 36
A0 SDRAM DQ19
A0 DQ19
34
DQ18
DQ18
59 33
DQ17
DQM3 DQ17
28 31
DQ16
DQM2 DQ16
71 85
DQ15
DQM1 DQ15
16 83
DQ14
DQM0 DQ14
82
DQ13
DQ13
18 80
CAS DQ12
CAS DQ12
RAS 19 79 DQ11
RAS DQ11
20 77
CS DQ10
CS DQ10
17 76
WE DQ9
WE DQ9
74
DQ8
DQ8
68 13
CLK_OUT DQ7
CLK DQ7
67 11
CKE DQ6
CKE DQ6
10
DQ5
DQ5
14 8
DQ4
R2112
NC1 DQ4
0 21 7
A11 DQ3
NC2 DQ3
NM 30 5
DQ2
NC3 DQ2
57 4
DQ1
NC4 DQ1
69 2
DQ0
NC5 DQ0
70
NC6
73
NC7
CLK_OUT
GND
TC_FPGA 010
MECHA_CON_IF 001,008
CONFIG_END 009
XFPGA_RST 009
AU_SRC_AVANT
C2101 001,003,012
AVANT (FPGA)
DVP-32 (3/12)
Ref. No. 2000
BOARD NO. 1-866-390-11
VCX-427_DVP-32_009_3
DSR-400/V2(J, E)
G H