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The following tables summarizes all possible Offset/Range configurations
PCI-DAS1002
UNIBIP
0
0
0
0
1
1
1
1
PCI-DAS1001
UNIBIP
0
0
0
0
1
1
1
1
ADPS[1:0]
These bits select the ADC Pacer Source. Maximum Internal/External Pacer
frequency is 330KHz.
Note: For ADPS[1:0] = 00 case, SW conversions are initiated
via a word write to BADR2 + 0. Data is 'don't care.'
READ
15
14
13
12
-
EOC
-
-
EOC
Real-time, non-latched status of ADC End-of-Conversion signal.
1 = ADC DONE
0 = ADC BUSY
GS1
GS0
Input Range
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
GS1
GS0
Input Range
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
ADPS1
ADPS0
0
0
0
1
1
0
1
1
11
10
9
8
-
-
-
-
Input Gain
1
±10V
2
± 5V
4
±2.5V
8
±1.25V
1
0-10V
2
0-5V
4
0-2.5V
8
0-1.25V
Input Gain
1
±10V
10
± 1V
100
±0.1V
1,000
±0.01V
1
0-10V
10
0-1V
100
0-0.1V
1,000
0-0.01V
Pacer Source
SW Convert
82C54 Counter/Timer
External Falling
External Rising
7
6
5
-
-
-
20
:
Measurement
Resolution
4.88 mV
2.44 mV
1.22 mV
610 uV
2.44 mV
1.22 mV
610 uV
305 uV
Measurement
Resolution
4.88 mV
488 uV
48.8 uV
4.88 uV
2.44 mV
244 uV
24.4 uV
2.44 uV
4
3
2
1
-
-
-
-
0
-
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