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¡ Semiconductor
Timer control register (TCON)
NAME
ADDRESS
TCON
88H
BIT LOCATION
FLAG
TCON.0
IT0
TCON.1
IE0
TCON.2
IT1
TCON.3
IE1
TCON.4
TR0
TCON.5
TF0
TCON.6
TR1
TCON.7
TF1
MSB
7
6
5
TF1
TR1
TF0
External interrupt 0 signal is used in level-detect mode when this bit is "0" and in
trigger detect mode when "1".
Interrupt request flag for external interrupt 0.
The bit is reset automatically when an interrupt is serviced.
The bit can be set and reset by software when IT0 = "1".
External interrupt 1 signal is used in level detect mode when this bit is "0", and in
trigger detect mode when "1".
Interrupt request flag for external interrupt 1.
The bit is reset automatically when an interrupt is serviced.
The bit can be set and reset by software when IT1 = "1".
Counting start and stop control bit for timer/counter 0.
Timer/counter 0 starts counting when this bit is "1", and stops counitng when "0".
Interrupt request flag for timer interrupt 0.
The bit is reset automatically when an interrupt is serviced.
The bit is set to "1" when a carry signal is generated from timer/counter 0.
Counting start and stop control bit for timer/counter 1.
The timer/counter 1 starts counting when this bit is "1", and stops counting when "0".
Interrupt request flag for timer interrupt 1.
The bit is reset automatically when interrupt is serviced.
The bit is set to "1" when carry signal is generated from timer/counter 1.
MSM80C154S/83C154S
4
3
2
TR0
IE1
IT1
FUNCTION
LSB
1
0
IE0
IT0
271
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