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MSM80C154S/83C154S
Power control register (PCON)
NAME
ADDRESS
PCON
87H
BIT LOCATION
FLAG
PCON.0
IDL
PCON.1
PD
PCON.2
GF0
PCON.3
GF1
PCON.4
—
PCON.5
RPD
PCON.6
HPD
PCON.7
SMOD
270
MSB
7
6
5
SMOD
HPD
RPD
IDLE mode is set when this bit is set to "1". CPU operations are stopped when
IDLE mode is set, but XTAL1•2, timer/counters 0, 1 and 2, the interrupt circuits,
and the serial port remain active. IDLE mode is cancelled when the CPU is reset
or when an interrupt is generated.
PD mode is set when this bit is set to "1". CPU operations and XTAL1•2 are
stopped when PD mode is set. PD mode is cancelled when the CPU is reset or
when an interrupt is generated.
General purpose bit.
General purpose bit.
Reserved bit. The output data is "1", if the bit is read.
This bit is used to specify cancellation of CPU power down mode (IDLE or PD) by an
interrupt signal.
Power-down mode cannot be cancelled by an interrupt signal if the interrupt is not
enabled by IE (interrupt enable register) when this bit is "0".
If the interrupt flag is set to "1" by an interrupt request signal when this bit is
"1" (even if interrupt is disabled), the program is executed from the next address
of the power-down-mode setting instruction.
The flag is reset to "0" by software.
The hard power-down setting mode in enabled when this bit is set to "1".
If the level of the power failure detect signal applied to the HPDI pin (pin 3.5)
is changed from "1" to "0" when this bit is "1", XTAL1•2 oscillation is stopped and
the system is put into hard power down mode. HPD mode is cancelled when the
CPU is reset.
When the timer/counter 1 carry signal is used as a clock in mode 1, 2 or 3 of
the serial port, this bit has the following functions.
The serial port operation clock is reduced by 1/2 when the bit is "0" for delayed
processing. When the bit is "1", the serial port operation clock is normal
for faster processing.
¡ Semiconductor
4
3
2
—
GF1
GF0
FUNCTION
LSB
1
0
PD
IDL
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