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ICs BLOCK DIAGRAM / TERMINAL DESCRIPTION
IC807 : PD0274A
Audio Quality Enhancer (AQE)
Pin Arrangement
1 DAIN
2 LRIN
3 BCKIN
4 RSTB
5 CGND
6 XIN
7 IGND
8 ICVDD
9 SCLK
10 SDATA
11 CSB
12
NC
TE
L 13942296513
Pin Function
No.
Name
1
DAIN
2
LRIN
3
BCKIN
4
RSTB
5
CGND
6
XIN
7
IGND
8
ICVDD
9
SCLK
10
SDATA
11
CSB
12
NC
13
NC
14
NC
15
NC
16
NC
17
NC
18
OVDD
www
19
OGND
20
CGND
21
BCKOUT
22
LROUT
.
23
DAROUT
24
DALOUT
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24
DALOUT
23
DAROUT
22
LROUT
21
BCKOUT
20
CGND
19
OVDD
NC
18
17
NC
16
NC
NC
15
14
NC
13
NC
I/O
I
Audio data input
I
L/R clock input
I
Bit clock input (48fs/64fs)
I
System reset "0" = Reset
Ground (0V) for Core
I
System clock input (128fs/192fs/256fs/384fs/512fs/768fs)
Ground (0V) for Input Buffer
Power supply (3.3V) for Core and Input Buffer
I
Microcomputer interface clock input
I
Microcomputer interface data input
I
Microcomputer interface chip select input "0" = Enable, "1" = Disenable
No connection
Power supply (3.3V) for Output Buffer
Ground (0V) for Output Buffer
Ground (0V) for Core
x
ao
u163
y
O
Bit clock output (48fs/64fs)
O
L/R clock output. WCLK output at PCM1704.
i
O
R ch audio data output
O
L ch audio data output or L/R ch multiplex output
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2 9
8
Block Diagram
IBS, TFS, IFS, LRIPOL,
IFORM, CKSEL, TEST
1
DAIN
Input
LRIN 2
Inter face
BCKIN 3
LRCK
BACS, BSO, OFORM,
LRPOL, DACS, TEST
DALOUT
24
DAROUT 23
Output
Inter face
LROUT 22
n*
BCKOUT
21
LRCK
CKSE
RSTB
4
Timing
Syscllk
Control
XIN
6
SDATA
10
Microcomputer
Q Q
SCLK 9
3
6 7
Interface
1 3
1 5
CSB
11
Pin Function
co
.
9 4
2 8
24
IBS, BES, DIR
Bit Extension
LRCK
24
24
LRCK
x8
Digital Filter
ATT +
Deemphasis
x2
24
IFS, DFS, CKSE,
1st FIR Filter
COES, ATT, DE
2fs
x2
2st FIR Filter
4fs
x2
3st FIR Filter
24
8fs
n*
LRCK
24
IFS, SMUTE,
Soft Mute
TEST
0 5
n*
8
2 9
9 4
2 8
LRCK
Note :
"n" in the Block diagram expresses the rate to sample
m
DV-SP500
9 9
9 9
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