Sharp LC-37AD5E Service Manual page 67

Pin No.
28
27
103
107
34
33
101
56
6, 7, 8, 10, 11, 12, 13, 14, 17, 18,
19, 20, 81, 82, 83, 87, 93, 100
9
Differential Signal Data Pins
40
39
44
43
48
47
52
51
59
58
63
62
67
66
71
70
Power and Ground Pins
22, 23, 35, 74, 79, 92, 105, 114,
128, 139
21, 24, 36, 73, 80, 91, 106, 115,
127, 138
5, 16, 26, 76, 89, 109, 122, 134
4, 15, 25, 75, 90, 108, 120, 135
38, 42, 46, 50, 57, 61, 65, 69
41, 45, 49, 53, 60, 64, 68, 72
37
55
54
94
95
98
99
Pin Name I/O
CSCL I Configuration I2C Clock. 5 V Tolerant
CSDA I/O Configuration I2C Data. 5 V Tolerant
SCDT O Indicates active video at HDMI input port
CLK48B I/O Data Bus Latch Enable
R0PWR5V I Port 0 Transmitter Detect. 5V Tolerant
R1PWR5V I Port 1 Transmitter Detect. 5V Tolerant
RSVDL I Reserved, must be tied LOW
RSVD_A Reserved Pin, leave unconnected
NC No internal connection
EVNODD O Indicates. Even or Odd field for interlaced formats. Polarity programmable in register
R0XC+ I
HDMI Port 0. TMDS input clock pair
R0XC- I
R0X0+ I
HDMI Port 0. TMDS input data pair
R0X0- I
R0X1+ I
HDMI Port 0. TMDS input data pair
R0X1- I
R0X2+ I
HDMI Port 0. TMDS input data pair
R0X2- I
R1XC+ I
HDMI Port 1. TMDS input clock pair
R1XC- I
R1X0+ I
HDMI Port 1. TMDS input data pair
R1X0- I
R1X1+ I
HDMI Port 1. TMDS input data pair
R1X1- I
R1X2+ I
HDMI Port 1. TMDS input data pair
R1X2- I
CVCC18 — Digital Logic VCC
CGND — Digital Logic GND
IOVCC — Input/Output Pin Supply (3.3V)
IOGND — Input/Output Pin Ground
AVCC — TMDS Analog VCC
AGND — TMDS Analog GND
PVCC0 — TMDS Port 0 PLL VCC
PVCC1 — TMDS Port 1 PLL VCC
TMDSPGND — TMDS PLL GND
AUDPVCC18 — ACR PLL VCC
AUDPGND — ACR PLL GND
XTALVCC — ACR PLL Crystal Input VCC
REGVCC — ACR PLL Regulator VCC
Pin Function
5 – 8
LC-37AD5E