Diagrams; Explanation Of Ic Terminals - Sony D-EJ750 Service Manual

D-EJ750/EJ751/EJ753/EJ755/EJ756CK/EJ758CK
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5-1. EXPLANATION OF IC TERMINALS

IC601 (SYSTEM CONTROL) CXD3029R (DSP IC)
Pin No. Pin name
1 XRAM
2 XWE
3 to 6 D0 to 3
7 DCLK
8 DCKE
9 XCAS
10 WFCK
11 to 13 A7 to 9
14 DVss
15 to 17 A4 to 6
18 XRDE
19 V 0
DD
20 CLOCK
21 SDTO
22 SENS
23 XLAT
24 XSOE
25 SYSM
26 WDCK
27 SCOR
28 TE XRST
L 13942296513
29 PWMI
30 XQOK
31 XWER
32 R4M
33 Vss0
34 SQCK
35 SCLK
36 SQSO
37 XEMP
38 XWIH
39 SBSO
40 EXCK
41 XTSL
42 HVss
43 HPL
44 HPR
45 HV
DD
46 XV
DD
47 XTAI
48 XTAO
49 XVss
50 AV 1
DD
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51 AOUT1
52 VREFL
53 AVss1
.
54 AVss2
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SECTION 5

DIAGRAMS

I/O
O DRAM low address strobe signal outut.
O DRAM data input enable signal output.
I/O DRAM data bus 0 to 3.
O Not used (OPEN).
O Not used (OPEN).
O DRAM column address storobe signal output.
O Not used (OPEN).
O DRAM address 7 to 9.
– Ground terminal for DRAM interface.
O DRAM addres 4 to 6.
I/O Not used (OPEN).
– Power supply for digital.
I Serial data transfer clock input.
I Serial data input.
O SENS output.
I Latch input.
I CPU serial data output enable signal input.
I Mute input. "H" : MUTE
O Word clock output.
O SCOR output.
I Reset terminal.
I Spindle moter external contorol input.
I/O Not used (OPEN).
I/O DRAM write enable signal input.
O System clock output.
– Digital ground terminal.
I Clock input for SQSO read out.
I Clock input for SENS serial date read out.
O Not used (OPEN).
O Not used (OPEN).
O Not used (OPEN).
O Not used (OPEN).
I Not used (Fixed at "L").
I Not used (Fixed at "L").
– Ground terminal for headphones.
O Headphone output (L-CH).
O Headphone output (R-CH)..
– Power supply terminal for headphones.
– Power supply terminal for master clock.
I Master clock input.
O Master clock output.
– Ground terminal for master clock.
– Power supply terminal for analog.
O Line out (L-CH).
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O VREF terminal (L-CH).
– Ground terminal for analog.
i
– Ground terminal for analog.
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