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6-7 DIGITAL-TO-ANALOG CONVERTER
PCM 1720
AIC1(Rev.1), AIC2
BCKIN
LRCIN
DIN
ML
MC
MD
RSTB
PIN
I/O
1
-
2
IN
3
O U T
4 ¡
IN
5 ¡
IN
6 ¡
IN
7 ¡
IN
8
O U T
O U T
9
P W R
1 0
P W R
1 1
O U T
1 2
-
1 3
1 4 ¡
IN
1 5 ¡
IN
1 6 ¡
IN
-
1 7
-
1 8
P W R
1 9
2 0
P W R
¡ These pins include internal pull-up resistors.
Samsung Electronics
Serial
Input
8X Oversampling
I/F
Digital Filter
with Function
Controller
Mode
Control
I/F
256f s /384f s
SCKI
N A M E
No Connection.
N C
System Clock input: 256f s or 384f s .
SCKI
Reserved for Factory Use.
T E S T
Latch Enable for Serial Control Data.
M L
Clock for Serial Control Data.
M C
Data Input for Serial Control.
M D
Reset Input. When this pin is low, the digital filters and modulators are held in reset.
R S T B
Zero Data Flag. This pin is low when the data is continuously zero for more than
Z E R O
65,535 cycles ro BCKIN.
V
R
Right Channel Analog Output.
O U T
A G H D
Analog Ground.
V
Analog Power Supply (+5V).
C C
V
L
Left Channel Analog Output.
O U T
C A P
Common Pin for Analog Output Amplifiers.
BCKIN
Bit Clock for Clocking in the Audio Data.
DIN
Serial Audio Data input.
LRCIN
Left/Right Word Clock. Frequency is equal to fs.
N C
No Connection.
N C
No Connection.
V
Digital Power supply(+5V). Recommended connection is to the analog power supply.
D D
D G N D
Digital Ground. Recommended connection is to the digital ground plane.
BLOCK DIAGRAM
Multi-level
Dalta-Sigma
Modulator
Multi-level
Dalta-Sigma
Modulator
BPZ-Cont.
PIN ASSIGNMENT
F U N C T I O N
Low-pass
DAC
Filter
Low-pass
DAC
Filter
Open Drain
Power Supply
V
AGND
V
DGND
CC
DD
IC Descriptions
V
L
OUT
CAP
V
R
OUT
ZERO
6-17
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