Sony TA-F501ES Service Manual page 41

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• IC Pin Function Description
MAIN BOARD IC2054 MB91F355APMT-F501-X101 (MAIN SYSTEM CONTROLLER)
Pin No.
Pin Name
BASS JOG1,
1, 2
BASS JOG2
TREB JOG1,
3, 4
TREB JOG2
5
SVOL LAT (A90)
6
TUNER LAT
7
TUNER DO
8
9
STEREO
10
RDS DATA
11
12
DSP RESET
13
DSP SPIDS (LAT)
14
DSP SPICLK
15
DSP MISO
16
DSP MOSI
17
18
DSP BCFG0,
19, 20
DSP BCFG1
21
SF CPU CE
TE
L 13942296513
22
SF DSP MAS
23
24
T/A XCS
25
26
T/A XRST
27
MAIN DO
28
MAIN CLK
29
SUB-U RESET
30
DIR XMODE
31
32
33
DIR ERROR
34
DIR CKST
35
36
37
AD/DA RESET
38
DAC LAT
39
DAC DO
40
AD (SB) RESET
41
ADMIX LAT (A90)
42
PDMIX LAT (A90)
43
RF ERR (A90)
www
44
45
.
46
47 to 49
NO USE
50
AD KEY1
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I/O
I
Jog dial pulse input from the rotary encoder (for BASS)
I
Jog dial pulse input from the rotary encoder (for TREBLE)
O
Serial data latch pulse signal output terminal
O
Serial data latch pulse signal output terminal
I
Serial data input terminal
TUNED
I
Tuned detection signal input terminal
I
FM stereo detection signal input terminal
I
RDS serial data input terminal
DATA0
I
Audio serial data input from the digital audio interface
O
System reset signal output to the DSP
O
Serial data latch pulse output to the DSP
O
Not used (Open)
I
Serial data input terminal
O
Serial data output terminal
VSS
Ground
VCC
Power supply (+3.3V)
Not used
O
Chip enable signal output for the serial flash
I
Master/slave selection signal input from the DSP
96/24
Not used
O
Chip select signal output terminal
T/A SO
I
Serial data input terminal
O
System reset signal output terminal
O
Serial data output to the sub system controller
O
Serial data transfer clock signal output to the sub system controller
O
System reset signal output to the sub system controller
O
System reset signal output to the digital audio interface
DIR CE
O
Chip enable signal output to the digital audio interface
DIR DO
I
Serial data input from the digital audio interface
I
PLL lock error signal and data error flag input from the digital audio interface
I
Clock select signal input from the digital audio interface
VSS
Ground
VCC
Power supply (+3.3V)
O
System reset signal output to the A/D converter and D/A converter
O
Serial data latch pulse signal output terminal
I
Serial data input terminal
O
System reset signal output terminal
O
Serial data latch pulse signal output terminal
O
Serial data latch pulse signal output terminal
I
Error signal input terminal
MUTE
O
System muting on/off control signal output terminal
x
ao
y
DAVS
Ground
i
DAVC
Power supply (+3.3V)
Not used (Open)
I
Muting key signal input terminal
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8
Pin Description
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
Q Q
3
6 7
1 3
Not used (Open)
Not used
Not used
u163
.
2 9
9 4
2 8
Not used (Open)
Not used (Open)
Not used
Not used
1 5
0 5
8
2 9
9 4
"H": DSP is master
Not used (Open)
Not used (Open)
"L": reset
Not used
Not used
"L": reset
Not used
Not used
m
co
TA-F501ES
9 9
2 8
9 9
"L": reset
41

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