Blockdiagram - Philips EXP210 Service Manual

BLOCKDIAGRAM

eye-pattern signal
during focus search
> 800 mVpp
2,5V
1 9
0
TB=0.1s
-2,5V
TB=0.5µs
TRANSFER OF AUDIO SAMPLES VIA SERIAL INTERFACE
2 5
SCLK
3 6
WCLK left channel right channel
4 7
DATA
DISC
TURNTABLE
MOTOR
12 10
TRACK
SERVO
9
FOCUS
SERVO
11
SLIDE
SERVO
PHOTO DIODE
ARRAY
C
F
B
DA23-ZPH
CD-DRIVE
+UP RESET &
POW ON/OFF
DC/DC
CONVERTER
DC-in socket
1251
+
+A STAB.
T700mA
DC/DC
CONVERTER
ACCU or
BATTERY +
charge
BATTERY
DETECTION
CHARGE
SWITCH
TEMP.
DETECT.
SUPPLY/CHARGE
CIRCUIT
3-7
servo in or
disc motor cw
10
3V
not moving
11
0
servo out or
disc motor ccw
12
-3V
servo out or disc motor cw
13
3V
not moving
14
servo in or
(FROM SUPPLY)
disc motor ccw
15
0
MEMBRANE
KEYBOARD
SIO_DAT
FROM/TO
RC-CIRCUIT
+2.6V
RC-SOCKET
SIO_CLK
S_MUTE (FROM DSP)
VCC2, VCCL PWRON EQSEL CDRW
LASER
LD
SUPPLY &
RFEQO
PROTECT.
MON
Laser
CMFB
1x
diode
Monitor
DIN RFFB
diode
4x
2x
TZA1024
HF-PREAMPLIFIER
7800
+
D
E FLEX
A
DC_IN (TO µP) +DC
+DC
DCIN
+UP
H-BRIDGE
DM±
UP_RESET
MOTOR DRIVER 2
+1.5V
VG VLG
+3.3V SL± H-BRIDGE
MOTOR DRIVER 4
+A
VG VLG
+2.6V
H-BRIDGE
Focus±
MOTOR DRIVER 1
VG VLG
H-BRIDGE
Track±
MOTOR DRIVER 3
BATT_LEVEL/
VG VLG
ACCU (TO µP)
VC
DC/DC SAW
VOUT CONVERTER GEN.2
VIN
CONST.VOLT.
CURRENT & CONTROL
RF2
CHARGE
CHGSW
RS
SC111259AFTA
DBB_ON#TMP
SERVO DRIVER &
(TO µP)
POWER MGT. IC
LCD
7400 MDCL, MDDA
P TMP86CH21AU
RAM LCD DRIVER
+3.3V
RESET
UP_RESET
CLOCK GEN. 16bit TIMER
& TIMING COUNTER
4.2MHz
I/O PORTS
1)
FROM SUPPLY/ TO SERVO & TO HEADPHONE AMP.
CHARGE CIRCUIT POWER MGT.
CD10_RESET
(FROM DSP)
RESET
1
EBU
HFIN
FRONT END
INTERFACE
ERROR MOTOR
DIGITAL PLL
CORRECT. CONTROL
E R1
EFM
SRAM
DEMOD. ADDRESS.
F R2
B D1
CONTROL PART
A D2
C D3
FUNCTION
PRE-PROC.
CONTROL PROCESS.
D D4
Vref
SAA7324H
OUTPUT
CD10 STAGES
7830
SL FO RA
7256
DM_IN DM_PWM
(FROM DSP)
L.P.F.
VR SAW
15
SLIDE_IN SL
(PWM signal)
L.P.F.
VR SAW
13
FOCUS_IN FO (PWM signal)
L.P.F.
VR SAW
14
TRACK_IN RA (PWM signal)
L.P.F.
VR SAW
SAW
SAW
GEN.1
RESET
CHG_ON
FROM µP
SLEEP
WAKE
S_MUTE
(FROM DSP)
3-7
+UP
VDD
ROM
ALU
MDL
MDDA
MDCL
DSP_CLK
16.9MHz
+2.6V
DM
(TO SERVO)
7481
MOTO1 VDD
64Mbit
DRAM
AD0...AD9,
TIMING
7480
SBSY DD0...DD15
SFSY
SUB
RCK
SUBCODE
PROCESS.
TMS320DA150PGE160
RAM PEAK RESET
(FROM µP)
DET.
DSP_CLK
SILD (FROM CD10)
RAB CD10_RESET
SCL (TO CD10)
SDA
µP
SCLK
WCLK
INTERFACE
DATA
SCLK
EF
WCLK
2-4
DATA, EF
AUDIO SERIAL
INTERFACE
SCLI
WCLI
5-7
SDI
SERIAL
LOOPBACK
BITSTREAM
KILL
DAC
7305
MUTE
MUTE Switch
MUTE
(FROM DSP) CONT.
VOLUME
IN B
Vref
IN A
Low-pass
boost
3320
DBB
Switch
TREBLE
DBB
Beep in
CONT.
DBB_STEP
DBB_ON
BA3574BFS
BEEP
HEADPHONE AMP.
+1.5V
+3.3V +3.3V +3.3V (+core)
VDD 7482 VDD
FLASH
EPROM
AD0...AD16,
DD0...DD15
DVDDx
CVDDx
DSP
AUD_SCLK
AUD_WCLK
AUD_SD S_MUTE
(TO SERVO)
MUTE
(TO MUTE
CONTROL)
DM_PWM
(TO SERVO)
+A/+2.6V
+2.6V
VCC
RIPPLE POW.
FILTER SW.
1301
LEFT 1
+2.6V
Vref
6
HEADPHONE
RIGHT
&RC-SOCKET
SIO_DAT SIO_CLK
FROM/TO µP
BEEP
1)
not on all versions