T-Sgpio 1/2 Headers; Tpm Header/Port 80 Header - Supermicro X10SLH-LN6TF User Manual

X10SLH-LN6TF User's Manual

T-SGPIO 1/2 Headers

Two Serial-Link General Purpose
Input/Output headers (T-SGPIO 1/2)
are located on the motherboard to en-
hance system performance. See the
table on the right for pin definitions.

TPM Header/Port 80 Header

A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin defini-
tions.
C A
A C
LE5
LE6
BMC
BIOS
LICENSE
C226
C
A
LE1
X10SLH-LN6TF
REV:1.01
DESIGNED IN USA
USB0(3.0)
USB1(3.0)
USB12/13
JSD2
JSD1
B1
C
JBT1
SPKR1
J4
FANA
J3
FAN4
A B
A
C
VGA
LAN5/6 LAN3/4 LAN1/2
JLAN3 JLAN2
X540
X540
JP1000
A
PLX
FAN2 FAN1
BAR CODE
MAC CODE IPMI CODE
2-30
Pin Definitions
Pin# Definition
1 NC
3 Ground
5 Load
7 Clock
Note: NC= No Connection
TPM/Port 80 Header
Pin Definitions
Pin # Definition
1 LCLK
3 LFRAME#
5 LRESET#
7 LAD 3
9 +3.3V
11 LAD0
13 SMB_CLK4
15 +3V_DUAL
17 GND
19 LPCPD#
IPMI LAN USB4/5 (2.0)
USB2/3(3.0) COM1
JPUSB1
JLAN1
JSTBY1
JPL1
JPL2
JPL3
X540
NMI
PWR
LED
HDD
LED
NIC1
NIC2
OH/
FF
JPW2
RST
PWR
ON
JLED1:3 pin Power LED
T-SGPIO
Pin Definition
2 NC
4 Data
6 Ground
8 NC
Pin # Definition
2 GND
4 <(KEY)>
6 +5V (X)
8 LAD 2
10 LAD1
12 GND
14 SMB_DAT4
16 SERIRQ
18 CLKRUN# (X)
20 LDRQ# (X)
A.T-SGPIO 1
B.T-SGPIO 2
C.JTPM1