Sanyo PLC-XF60A Service Manual page 89

Control Port Functions
Pin Function Name
132 GND
133 CS_SDI_CPU
134 3.3V
135 SCLK_GAM_CPU
136 SDATA_GAM_CPU
137 GND
138 SCALER_RESET
139 1.9V
140 PW_SEL
141 EXP_RESET
142
143 TDO [for ICE]
144 (Not used)
145 (Not used)
146 SAM3_WAIT
147 RESETM
148 Reserved
149 SIN_SDI_CPU
150 ASEMD0 [for ICE]
151 ASEBRKAK [for ICE]
152 USBB VBUS
153 AUDATA[3] [for ICE]
154 AUDATA[2] [for ICE]
155 GND
156 AUDATA[1] [for ICE]
157 1.9V
158 AUDATA[0] [for ICE]
159 GND
160 TRST [for ICE]
161 3.3V
162 TMS [for ICE]
163 TDI [for ICE]
164 TCK [for ICE]
165 (Not used)
166 ---
167 LAMP1_ERR
168 LAMP2_ERR
169 MD0
170 1.9V
171 CAP1
172 GND
173 GND
174 CAP2
175 1.9V
176 AUDCK [for ICE]
177 GND
178 1.9V
179 Reserved
180 EXTAL
181
182
183 FPGA_nSTATUS
184 FPGA_CONF_DONE
185 SDA_AV
186 SCL_AV
187
188 GND
189 CKIO
190 3.3V
191 TxD0
192 (Not used)
193 (Not used)
194 (Not used)
195 TxD2
196 (Not used)
197 (Not used)
Function
Power for Input/Output(0V)
Dual SDI Control(4 line Serial SOUT)
Power for Input/Output(3.3V)
Control for Digital Gamma IC (3 line Serial CLK)
Control for Digital Gamma IC (3 line Serial DATA)
Power (0V)
SCALER Reset Signal
Power (1.9V)
PIXEL 232C Selection
I/O Expander-1/2 Reset SIgnal
NET_SW
Test Data output
PCC Reset/DMA Request
PCC Buffer Control/DMA acknowledge0
Hardware Wait Request
Manual Reset Reuest
Analog Trigger/Inout Port H
Dual SDI Control (4 line Serial SIN)
ASE Mode
ASE Brake
USB Connection Check
AUD data
AUD data
Power (0V)
AUD data
Power (1.9V)
AUD data
Power for Inout/Output(0V)
Teset Reset
Power for Inout/Output(3.3V)
Test Mode Switch
Test Data Input
test Clock
PCCREG/Input Port F/Reserved
Lamp1 Fail Detection
Lamp2 Fail Detection
Clock Mode Setting [Default:L]
PLL1 Power (1.9V)
PLL1 External Condenser
PLL1 Power (0V)
PLL2 Power (0V)
PLL2 External Condenser
PLL2 Power (1.9V)
AUD Clock
Power (0V)
Power (1.9V)
Clock Oscillator
Extarnal Click/X'TAL
Not used (Input Port)
Not used (Input Port)
Error Detection during the Configuration
OK Detection during the Configuration
IIC Bus
IIC Bus
LCD Clock Output/InputOutput Port H
Power for Inout/Output(0V)
System Clock IO
Power for Inout/Output(3.3V)
Transmitting Data0 [PADremote Control]
Serial Clock0/IO Port for SCI
SIOF Send Data/Output Port for SCI
SIOF Clock In/IO Port for SCI
Send Data2 [External]
SIOF Clock/IO Port for SCI
SIOF Frame Sync/IO Port for SCI
- 89 -
Pol. Action
- -
- -
- -
O Reset with H->L->H
- -
O SH:H, PW:L
O Reset: H
O
O -
- (Open)
- (Open)
I Wait with L
I -
(Open)
I Not used
I -
O -
I -
O -
O -
- -
O -
- -
O -
- -
I -
- -
I -
I -
I -
I -
I (Open)
I Lamp Failure Detection until Dimmer Starts
I Lamp Failure Detection until Dimmer Starts
I Switch
- -
- [470pF]
- -
- -
- [470pF]
- -
I -
- -
- -
- (Open)
I -
I
I -
I H:Error
I H:OK
IO LActive
IO LActive
IO -
- -
I/O -
- -
O
- (Open)
- (Open)
- (Pull-up)
O 19200bps or 9600bps
- (Pull-up)
- (Pull-up)