Terminal Functions - Marantz SR9600 Service Manual

Q701 : TMS320DA610A003BPYP225
SIGNAL PIN NO.
NAME PYP
CLKIN 204
CLKOUT2/GP0[2] 82
CLKOUT3 184
CLKMODE0 205
PLLHV 202
OSCIN 178
OSCOUT 179
OSCV 181
DD
OSCV 180
SS
TMS 192
TDO 187
TDI 191
TCK 193
TRST 197
EMU5 —
EMU4 —
EMU3 —
EMU2 —
EMU1 185
EMU0 186
†
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
‡
IPD = Internal pulldown, IPU = Internal pullup. [These IPD/IPU signal pins feature a 13-kΩ resistor (approximate) for the IPD or 18-kΩ resistor
(approximate) for the IPU. An external pullup or pulldown resistor no greater than 4.4 kΩ and 2.0 kΩ, respectively, should be used to pull a signal
to the opposite supply rail.]
§
A = Analog signal (PLL Filter)

Terminal Functions

IPD/ IPD/
† †
TYPE TYPE
IPU‡
GDP
CLOCK/PLL CONFIGURATION
A3 I IPD Clock Input
Clock output at half of device speed (O/Z) [default] (SYSCLK2 internal signal
Y12 O/Z IPD
from the PLL controller) or this pin can be programmed as GP0[2] pin (I/O/Z)
D10 O IPD Programmable clock output (OSC Divider internal signal from PLL controller)
PLL input clock source select
• Selects whether the PLL input clock is CLKIN (square wave) [pin high] or
C4 I IPU
whether the PLL input clock is directly from the crystal oscillator (OSCIN and
OSCOUT) [pin low].
§
C5 A Analog power (3.3 V) for PLL
D12 I — Crystal oscillator Input (XI)
C12 O — Crystal oscillator output (XO)
Power for crystal oscillator (1.2 V), Do not connect to board power 1.2 V; for
A12 S — optimum performance, connected internally. If CLKIN is used instead of the
oscillator, then this pin can be left open or connected to CV
Ground for crystal oscillator, Do not connect to board ground; for optimum
B11 GND — performance, connected internally. If CLKIN is used instead of the oscillator,
then this pin can be left open or connected to V
JTAG EMULATION
B7 I IPU JTAG test-port mode select
A8 O/Z IPU JTAG test-port data out
A7 I IPU JTAG test-port data in
A6 I IPU JTAG test-port clock
JTAG test-port reset. For IEEE 1149.1 JTAG compatibility, see the IEEE 1149.1
B6 I IPD
JTAG Compatibility Statement section of this data sheet.
B12 I/O/Z IPU Emulation pin 5. Reserved for future use, leave unconnected.
C11 I/O/Z IPU Emulation pin 4. Reserved for future use, leave unconnected.
B10 I/O/Z IPU Emulation pin 3. Reserved for future use, leave unconnected.
D3 I/O/Z IPU Emulation pin 2. Reserved for future use, leave unconnected.
Emulation [1:0] pins
• Select the device functional mode of operation
B9
I/O/Z IPU
D9
The DSP can be placed in Functional mode when the EMU[1:0] pins are
configured for either Boundary Scan or Emulation.
Note: When the EMU[1:0] pins are configured for Boundary Scan mode, the
internal pulldown (IPD) on the TRST signal must not be opposed in order to
operate in Functional mode.
For the Boundary Scan mode drive EMU[1:0] and RESET pins low.
DESCRIPTION DESCRIPTION
EMU[1:0] Operation
00 Boundary Scan/Functional Mode (see Note)
01 Reserved
10 Reserved
11 Emulation/Functional Mode [default] (see the IEEE 1149.1
JTAG Compatibility Statement section of this data sheet)
171
.
DD
.
SS