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Detailed Block Diagram
The detailed block diagram (Figure 6) shows many more data paths of the communications
processor, including those for the memory unit, the buffer selector, and the controller selector;
but the overall pattern of data flow still applies. In general, data flows from one or more registers
to the lower data bus, through the Y-register to the arithmetic unit, to the Z drivers, and then
to one or more of the registers connected to the upper data bus. Data may also go from the
memory to the arithmetic unit at the same time that data is coming from the Y-register.
The register transfer instructions, a major class of instructions, permit any combination of
up to six (specific) registers to be combined in the Y-register, to be manipulated in some selected
manner, and then have the result put in any combination of up to four (specific) registers. Further
details of the register transfer instructions are given in the discussion of the instruction reper-
torie.
Description of Registers
This section contains information about each of the blocks on the detailed block diagram. Certain
conventions are followed:
First Item:
Second Item:
Third Item:
The size of the register.
The abbreviation for the name of the register (no abb. means no abbreviation
is used).
A or N, to indicate that the register is accessible or is not directly acces-
sible to the program.
A-Register (18 bits, A, A)
B-Register (18 bits, B, A)
The A and B registers are the principal working registers of the DATANET-30. They are
identical and have identical functions and instructions except for the parity network, which is
connected to just the B-register.
'C-Register (7 bits, C, A)
The C-register is used to specify a particular input/output channel of the buffer selector. In
addition, C can be used as a normal index register when indirect addressing is used.
L-Register (14 bits, L, N)
The L-register contains the address of the next memory location to be accessed. In the step/
stop mode, the register
will
contain the operand address of the instruction last executed.
[ID&uru~~u~ ~®------------
1-10
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