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DAC530A2W
Texas Instruments DAC530A2W Manuals
Manuals and User Guides for Texas Instruments DAC530A2W. We have
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Texas Instruments DAC530A2W manual available for free PDF download: Manual
Texas Instruments DAC530A2W Manual (89 pages)
10-Bit Three-Channel and Two-Channel Voltage-Output and CurrentOutput Smart DAC With I2C or SPI
Brand:
Texas Instruments
| Category:
Computer Hardware
| Size: 2 MB
Table of Contents
Features
1
Applications
1
Description
1
Table of Contents
2
Pin Configuration and Functions
3
Specifications
5
Absolute Maximum Ratings
5
ESD Ratings
5
Recommended Operating Conditions
5
Thermal Information
5
Electrical Characteristics: Voltage Output
6
Electrical Characteristics: Current Output
8
Electrical Characteristics: Comparator Mode
10
Electrical Characteristics: General
11
Timing Requirements: I 2 C Fast Mode
12
Timing Requirements: I C Standard Mode
12
Timing Requirements: I C Fast-Mode Plus
12
Timing Requirements: SPI Write Operation
13
Timing Requirements: SPI Read and Daisy Chain Operation (FSDO = 0)
13
Timing Requirements: SPI Read and Daisy Chain Operation (FSDO = 1)
13
Timing Requirements: GPIO
14
Timing Diagrams
14
Typical Characteristics: Voltage Output
16
Typical Characteristics: Current Output
21
Typical Characteristics: Comparator
25
Typical Characteristics: General
26
Detailed Description
27
Overview
27
Functional Block Diagram
28
Feature Description
29
Device Functional Modes
31
Programming
47
Register Map
54
NOP Register (Address = 00H) [Reset = 0000H]
58
DAC-0-MARGIN-HIGH Register (Address = 0Dh) [Reset = 0000H]
58
DAC-1-MARGIN-HIGH Register (Address = 13H) [Reset = 0000H]
58
DAC-2-MARGIN-HIGH Register (Address = 01H) [Reset = 0000H]
59
DAC-0-MARGIN-LOW Register (Address = 0Eh) [Reset = 0000H]
59
DAC-1-MARGIN-LOW Register (Address = 14H) [Reset = 0000H]
59
DAC-2-MARGIN-LOW Register (Address = 02H) [Reset = 0000H]
60
DAC-0-GAIN-CONFIG Register (Address = 0Fh) [Reset = 0000H]
60
DAC-1-GAIN-CMP-CONFIG Register (Address = 15H) [Reset = 0000H]
61
DAC-2-GAIN-CONFIG Register (Address = 03H) [Reset = 0000H]
61
DAC-1-CMP-MODE-CONFIG Register (Address = 17H) [Reset = 0000H]
62
DAC-0-FUNC-CONFIG Register (Address = 12H) [Reset = 0000H]
63
DAC-1-FUNC-CONFIG Register (Address = 18H) [Reset = 0000H]
65
DAC-2-FUNC-CONFIG Register (Address = 06H) [Reset = 0000H]
67
DAC-0-DATA Register (Address = 1Bh) [Reset = 0000H]
69
DAC-1-DATA Register (Address = 1Ch) [Reset = 0000H]
69
DAC-2-DATA Register (Address = 19H) [Reset = 0000H]
69
COMMON-CONFIG Register (Address = 1Fh) [Reset = 0Fffh]
70
COMMON-TRIGGER Register (Address = 20H) [Reset = 0000H]
71
COMMON-DAC-TRIG Register (Address = 21H) [Reset = 0000H]
72
GENERAL-STATUS Register (Address = 22H) [Reset = 20H, DEVICE-ID, VERSION-ID]
73
CMP-STATUS Register (Address = 23H) [Reset = 000Ch]
74
GPIO-CONFIG Register (Address = 24H) [Reset = 0000H]
74
DEVICE-MODE-CONFIG Register (Address = 25H) [Reset = 0000H]
76
INTERFACE-CONFIG Register (Address = 26H) [Reset = 0000H]
76
SRAM-CONFIG Register (Address = 2Bh) [Reset = 0000H]
77
SRAM-DATA Register (Address = 2Ch) [Reset = 0000H]
77
BRDCAST-DATA Register (Address = 50H) [Reset = 0000H]
77
Application and Implementation
78
Application Information
78
Typical Application
78
Power Supply Recommendations
80
Layout
81
Layout Guidelines
81
Layout Example
81
Device and Documentation Support
82
Documentation Support
82
Receiving Notification of Documentation Updates
82
Support Resources
82
Trademarks
82
Electrostatic Discharge Caution
82
Glossary
82
Revision History
82
Mechanical, Packaging, and Orderable Information
82
Package Outline
86
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