Tektronix 8550 Manuals

Manuals and User Guides for Tektronix 8550. We have 1 Tektronix 8550 manual available for free PDF download: Manual

Tektronix 8550 Manual (236 pages)

MODULAR MDL SERIES AND EMULATOR PROCESSOR AND PROTOTYPE CONTROL PROBE SERVICE

Brand: Tektronix | Category: Computer Hardware | Size: 14 MB

About this Manual
3
Manual Organization
3
Documentation Overview
4
Table of Contents
5
Operators
11
Safety Precautions
11
Servicing
11
Section 1 GENERAL INFORMATION
13
Introduction
13
Modes of Operation
13
Control Probe
13
Emulator Processor
14
Prototype Control Probe
14
Prototype Control Probe Leds
14
Cable Termination Board
15
Introduction
17
Electrical Characteristics
17
Specifications
17
Environmental Characteristics
18
Section 3 OPERATING INFORMATION
19
Introduction
19
Configuration Jumpers
19
Emu 1
19
EMU 1 Jumper Location
19
Buffer Board
20
P1 (DT ACK Delay-Mode 1)
20
EMU 2 Jumper Location
20
P2 and P3
21
Restore)
21
Buffer Board Jumper Locations
21
Control Board Jumper Locations
22
Mobile Microprocessor Board Jumper
23
J1045 and J2045 (DTACK Enable Assertion Time)
24
Emulator Processor Jumper Default Positions
24
Fig
24
System Jumpers and Straps
25
Section 4 THEORY of OPERATION
27
Introduction
27
Information Flow
27
Edge Connectors P1
27
Edge Connector Socket J2
27
P6 and P7
27
Prototype Control Probe
29
Mobile Microprocessor Board
30
Emulator Processor Overview
30
AUX Status Port (8E)
30
EMU Control Port (AD)
30
EMU Control Port
30
AUX Control Port (BE)
31
Command Port
31
EMU Control Port
31
AUX Control Port
31
Table
31
Forced Function Code Encoding
31
Run/Sequence Control
32
1/0 and RAM Access Control
32
Section 4 THEORY of OPERATION (Cont.)
32
Ram
32
Breakpoint RAM
32
Command Encoding
32
Emulator Processor RAM Partitioning
33
2650 RAM Access Bit Encoding
33
Breakpoint RAM Partitioning
33
Shared Communication RAM
34
Breakpoint RAM Data out
34
Shared Communication RAM Memory Map
34
UMAP and Write Protect RAM
35
Dump and Restore PROM
35
UM Ap/Write Protect RAM Partitioning
35
Emulator Processor Operation Support
36
Development System/Emulator Processor Communication
36
Microprocessor/Emulator Processor Communication
36
Microprocessor/Development System Communication
36
Umap/Write Protect RAM Data out
36
Addresses Presented to the Umap/Write Protect Rams
36
Emulator Processor/Top Plane Communication
37
Circuit Descriptions
37
Emulator Board 1 (EMU 1)
37
Data Buffers
37
Address Buffers
37
Upper Address Enable
37
Internal Address Latches
37
Internal Data Bus Latches
37
Internal Bus Latch Control
37
Internal Address Latches Enable Timing
38
DATA LAT en(H) Timing
38
Isolation Buffer Control
39
Function Code Buffer
39
UMAP Valid Generator
39
TT a Strobe Generator
39
System Interface and Controi
39
MODEO Clock
40
Break Interrupt Control
40
RUN Control
40
Factory Test NMI Control
40
RESET/HALT Control
40
User RUN Control
40
F.P. HOLD Interface
41
AUTO Vector Request
41
D/Rprom
41
UGET/UPUT Decode
41
68000 Memory Address Map
41
Transfer out of D/R Control
42
Transfer into D/R Control
42
Sharedram
42
Shared RAM Select
42
D/R Interrupt Trapstack Control
43
Asynchronous Break Control
43
MAC Board Address Generator
43
Command Port
43
Command Port R/W Control
43
MAC Board Relocation Decode
43
Emulator Board 2 (EMU 2)
44
2650 1/0 Access Decode
44
EMU RAM Access Decode
44
Signals
44
Emulator Processor Port Address
44
STOP Instruction Decode
45
Emulator Break Generator
45
TTA Break Decode
45
Jump Acknowledge Generator
45
Write Protect Interrupt Generator
45
Auxiliary Status Latch
45
BKPT RAM Multiplexers
45
Breakpoint RAM Write Decode
45
Breakpoint RAM
46
Umap/Write Protect RAM
46
BKPT Read Decode
46
Breakpoint Interrupts
47
Bkpt1 Arms Bkpt2
47
Svc
47
Clock Fail Detect
47
Umap/Write Protect RAM Selection
47
Umap/Write Protect Data Lines
47
AUX Status Latch
48
AUX Control Latch
48
EMU Control Latch
48
Buffer Board
48
User Function Code Buffers
48
Probe to EMU Control Signal Buffer
48
Probe Control Signal Generation
48
User Strobe Enable/Disable
49
UGET/UPUT or RUNNING Decode
49
Clock Select
50
User Bus Request Control
50
Processor OT ACK Generation/Select
50
Probe to Prototype A/D Buffers
51
Probe to EMU AID Buffers
51
Buffer Board Feedthroughs
51
Mobile Microprocessor Board
51
OT ACK En/Wait State Generator
51
Control Board
51
Probe NMI Decode
51
EMU-Issued Interrupt Buffers
51
Probe Interrupt Decode
51
Memory Access Delays
51
EMU-Issued Interrupt Enable Control
52
RESET/HALT Buffers
53
Interrupt Buffer Control State Machine
53
Timing of the Buffer Control State
53
HALT/BR Tri-State Control
54
Probe NMI Pending Decode
54
Interrupt State Machine
54
Power Supply Board
54
+4.9V Regulator
54
+5.2V PROBE Regulator
56
Fan Control
56
LED Control
56
A Typical Emulation Cycle
56
Resetting the Emulator or Microprocessor
56
Emulator Reset
56
Microprocessor Reset
57
Starting the Emulator
57
Running the Emulator
57
Stopping the Emulator
58
Non-Debug Interrupts
58
Debug Interrupts
58
Section 5 FUNCTIONAL CHECK PROCEDURES
59
Introduction
59
8550 Microcomputer Development Lab Verification
59
Procedure
59
8540 Integration Unit Verification
60
Procedure
60
Section 6 ADJUSTMENT PROCEDURES
61
Introduction
61
Prototype Control Probe Power Supply Calibration
61
Equipment Required
61
Procedure
61
Access to Power Supply Board
61
Section 7 PERFORMANCE CHECK PROCEDURES
63
Introduction
63
Performance Verification
63
Equipment Required
63
Test Procedures
63
Equipment Setup
63
Functional Test Procedure
63
Processor Test Procedure
65
Emulator Timing Verification
65
Measurement Considerations
65
Equipment Required
66
Controlling the Signal Lines under Test
66
Diagnostic Testing
66
Diagnostics Overview
66
Test Option Selection
67
Test Module Selection
67
Command Port Test Patterns
68
Error Loop Option Selection
69
Display Option Selection
69
Diagnostic Program Overview
70
Test Descriptions
71
Test Group 0 Emulator Detection
71
OE/0000-EMU Detection Test
71
Test Group 1
71
OE/0010-EMU Activation Sequence Test
72
Test Group 2 Dump/Restore Logic Verification
76
OE/0022-UMAP/BKPT RAM Access Test
78
OE/0023-Register Restore/Dump Test
79
OE/0024-D/R ROM Routines Completion Test
79
Test Group 3 Emulation Mode 0 Verification
80
OE/0030-SLVPAUSE/RUN Line Test
81
OE/0031-RUNUSER Test
81
OE/0033-AO Write Test
83
OE/0034-STOP Instruction Test
83
Test Group 4 BKPT Tests
85
Section 7 PERFORMANCE CHECK PROCEDURES (Cont.)
85
Test Group 5 SVC Tests
87
OE/0050-JMP ACK/SVC INHIBIT Test
87
OE/0051-SVC Operational Test
87
Test Group 6 Write Protect/Memory Map Verification
88
Test Group 7 68000 CPU Test
89
Test Group 8 TTA Interface Test
90
Test Group 9 MAC Interface Test
91
Test Module Specifics
93
Locations
95
Suspected Bad Devices for Test OE/0015
95
Breakpoint RAM Test Passes
95
Shared Communication RAM Test Patterns
96
EMU Status Port
99
Passes
101
SVC Operationai Test Pass Parameters
101
68000 CPU Test Instruction Failures
103
Section 8 MAINTENANCE and TROUBLESHOOTING
105
Introduction
105
Static-Sensitive Parts
105
Reducing Susceptibility to Static Discharge
105
Preventive Maintenance
105
Cleaning
105
Exterior
106
Interior
106
Visual Inspection
106
Section 8 MAINTENANCE and
106
Servicing Aids
106
Diagrams
106
Circuit Board Illustrations
106
Ceramic and Film Capacitor Code
106
Capacitor Marking
107
Resistor Marking
107
Tantalum Capacitor Color Code
107
Metal Film Resistor Color Code
107
Diode Code
108
Coil and Transformer Identification
108
Transistor and Integrated Circuit Pin Configuration
108
Obtaining Replacement Parts
108
Diode Polarity Markings
108
Integrated Circuit Pin 1 Identification
108
Assembly Repair and Exchange Program
109
Access to Power Supply Board
109
Access to Control Board and Buffer Board
109
Troubleshooting
110
Initial Equipment Checks
110
Will Not Boot up (Disk-Resident Systems Only)
110
Emulation Problems
110
Access to Mobile Microprocessor Board
110
Servicing the Prototype Control Probe Plug
111
Section 9 INSTALLATION PROCEDURES
113
Introduction
113
Installing the Emulator Processor and Prototype Control Probe
113
Control Probe
113
Removal/Installation of Top Cover
113
EMU 1/EMU 2 Interconnection with
115
Recommended Module Arrangement
115
Connecting to Options
116
Strain Relief Plate Installation/Removal
116
Connecting to the TTA and MAC Boards (Optional)
117
Ribbon Cable Installation
117
MAC Jumper and Switch Settings
117
Connecting to the TTA Only (Optional)
118
Connecting to the MAC Board Only (Optional)
119
Connecting the 68000 Emulator Processor
119
Controller Board
119
Connecting to the Prototype
120
Grounding
120
Pin Identification and Proper Plug Insertion
120
Using a Zero-Insertion-Force Socket
120
Section 10 TECHNICAL REFERENCE MATERIAL
121
Introduction
121
Circuit Block Locator
121
Signal Summary
122
Test Points
130
Emu 1 Tp1141
130
Pin Locators
131
Main Interconnect Bus
131
Power Supply Board
131
Emu 1 Tp1143
131
EMU 2 Test Points
131
Power Supply Board Test Points
131
Main Interconnect Bus P1
131
Top Plane Connectors
134
Top Plane Connector P6
134
Table
134
Top Plane Connector P7
134
68000 Emulator Processor Interconnections
135
68000 Emulator Processor Connectors
135
P12 Interconnect
136
P13 Interconnect
136
J2 and P2 Interconnect
137
P100 and P110 Interconnect
139
P200 and P210 Interconnect
139
P300 and P310 Interconnect
140
P10 and J11 Interconnect
140
P8A and P9A Interconnect
141
P8C and P9C Interconnect
141
P4 Interconnect
142
PS Interconnect
142
1/0 Port Configurations
143
Emulation Mode Encoding
143
Forced Function Code Encoding
144
RAM Partitioning
145
Emulator Processor RAM Partitioning
145
2650 RAM Access Bit Encoding
145
Memory Restrictions
146
Memory Configurations
146
Timing Relationships
146
Memory Arrangement Restrictions
146
J1045 and J2045 Configurations
146
Timing Comparison
147
Section 11 REPLACEABLE ELECTRICAL PARTS
151
Command Port
184
AUX Status Port
189
EMU Status Port
193
Interrupt State Machine
219
Section 13 REPLACEABLE MECHANICAL PARTS
225
Manual Change Information
232
EMU Status Port
232
EMU Control Port
232
AUX Status Port
232
AUX Control Port
232

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